AD7453BRT-R2 datasheet(3/20 Pages) AD

3 / 20 page

REV. 0

–3–

AD7453

Parameter

Test Conditions/Comments

A Version

B Version

Unit

POWER REQUIREMENTS

VDD

2.7/5.25

V min/max

IDD

7, 8

Normal Mode (Static)

SCLK on or off

0.5

mA typ

Normal Mode (Operational)

VDD = 4.75 V to 5.25 V

1.5

mA max

VDD = 2.7 V to 3.6 V

1.2

mA max

Full Power-Down Mode

SCLK on or off

mA max

Power Dissipation

Normal Mode (Operational)

VDD = 5 V; 1.55 mW typ for 100 kSPS

7.25

mW max

VDD = 3 V; 0.64 mW typ for 100 kSPS

3.3

mW max

Full Power-Down Mode

VDD = 5 V; SCLK on or off

mW max

VDD = 3 V; SCLK on or off

mW max

NOTES

1Temperature ranges as follows: A, B versions: –40

∞C to +85∞C.

2See Terminology section.

3Analog inputs with slew rates exceeding 27 V/ s (full-scale input sine wave > 3.5 MHz) within the acquisition time may cause an incorrect result to be returned by

the converter.

4A small dc input is applied to V

IN– to provide a pseudo ground for VIN+.

5The AD7453 is functional with a reference input in the range 100 mV to 3.5 V.

6Sample tested @ 25

∞C to ensure compliance.

7See Power Versus Throughput Rate section.

8Measured with a midscale dc input.

Specifications subject to change without notice.

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