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TDA4AL...ALZQ1 数据表(PDF) 8 Page - Texas Instruments |
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TDA4AL...ALZQ1 数据表(HTML) 8 Page - Texas Instruments |
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8 / 251 page ![]() 6 Terminal Configuration and Functions 6.1 Pin Diagrams See Packaging Information. 6.2 Pin Attributes 1. BALL NUMBER: Ball numbers on the bottom side associated with each signal on the bottom. 2. BALL NAME: Mechanical name from package device (name is taken from muxmode 0). 3. SIGNAL NAME: Names of signals multiplexed on each ball (also notice that the name of the ball is the signal name in muxmode 0). 4. MUXMODE: Multiplexing mode number. 5. TYPE: Signal type and direction: • I = Input • O = Output • OD = Open drain terminal - Output • IO = Input or Output • IOD = Open drain terminal - Input or Output • IOZ = Input, Output or Three-state terminal • OZ = Output or Three-state terminal • A = Analog • PWR = Power • GND = Ground • CAP = LDO Capacitor. 6. I/O VOLTAGE VALUE: This column describes the IO voltage value (the corresponding power supply). An empty box means Not Applicable. 7. BALL STATE DURING RESET:This column describes the state of the transmit buffer, receive buffer, and internal pull during reset. 8. BALL STATE AFTER RESET:This column describes the state of the transmit buffer, receive buffer, and internal pull after reset. 9. MUX MODE AFTER RESET:The active multiplexing mode after reset. 10. POWER: The voltage supply that powers the terminal IO buffers. An empty box means Not Applicable. 11. VOLTAGE BUFFER TYPE: This column describes the associated output buffer type. An empty box means Not Applicable. 12. IO RET:Yes means WKUP and IO retention supported. 13. PADCFG NAME:Name of the pad configuration register. 14. PADCFG ADDRESSAddress of the pad configuration register. TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1 SPRSP62 – DECEMBER 2022 www.ti.com 8 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1 |
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