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TDA4AL...ALZQ1 数据表(PDF) 15 Page - Texas Instruments

部件名 TDA4AL...ALZQ1
功能描述  TDA4VE TDA4AL TDA4VL Jacinto™ Processors, Silicon Revision 1.0
PDF  251 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TDA4AL...ALZQ1 数据表(HTML) 15 Page - Texas Instruments

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Table 6-2. Pin Attributes (ALZ Package) (continued)
Ball
Num [1]
Ball
Name [2]
PADCFG Register [13]
PADCFG Address [14]
Signal
Name [3]
Mux
Mode [4]
Signal
Type [5]
I/O
Voltage [6]
Ball State
DURING
Reset
(RX/TX/PULL) [7]
Ball State
AFTER
Reset
(RX/TX/PULL) [8]
Mux
Mode
AFTER
Reset [9]
Power [10]
Voltage
Buffer
Type [11]
IO
RET [12]
Y3
DDR0_DQ23
DDR0_DQ23
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AB3
DDR0_DQ24
DDR0_DQ24
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AA2
DDR0_DQ25
DDR0_DQ25
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AA4
DDR0_DQ26
DDR0_DQ26
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
Y5
DDR0_DQ27
DDR0_DQ27
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AC2
DDR0_DQ28
DDR0_DQ28
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AB5
DDR0_DQ29
DDR0_DQ29
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AD2
DDR0_DQ30
DDR0_DQ30
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AC4
DDR0_DQ31
DDR0_DQ31
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
H1
DDR0_DQS0N
DDR0_DQS0N
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
G1
DDR0_DQS0P
DDR0_DQS0P
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
M1
DDR0_DQS1N
DDR0_DQS1N
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
L1
DDR0_DQS1P
DDR0_DQS1P
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
U1
DDR0_DQS2N
DDR0_DQS2N
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
V1
DDR0_DQS2P
DDR0_DQS2P
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
AC1
DDR0_DQS3N
DDR0_DQS3N
IO
1.1 V
VDDS_DDR /
VDDS_DDR_C
0
DDR
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TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1
SPRSP62 – DECEMBER 2022
Copyright © 2023 Texas Instruments Incorporated
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