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TDA4AL...ALZQ1 数据表(PDF) 160 Page - Texas Instruments |
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TDA4AL...ALZQ1 数据表(HTML) 160 Page - Texas Instruments |
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160 / 251 page  7.10.5.6.1 Timing Requirements for eCAP NO. PARAMETER DESCRIPTION MIN MAX UNIT CAP1 tw(cap) Pulse duration, CAP (asynchronous) 2 + 2P(1) ns (1) P = sysclk CAP CAP1 EPERIPHERALS_TIMNG_01 Figure 7-44. eCAP Input Timings 7.10.5.6.2 Switching Characteristics for eCAP NO. PARAMETER DESCRIPTION MIN MAX UNIT CAP2 tw(apwm) Pulse duration, APWM –2 + 2P(1) ns (1) P = sysclk APWM CAP2 EPERIPHERALS_TIMNG_02 Figure 7-45. eCAP Output Timings For more information, see Enhanced Capture (ECAP) Module section in Peripherals chapter in the device TRM. 7.10.5.7 EPWM The supported features by the device EPWM are: • Dedicated 16-bit time-base counter with period and frequency control • Two independent PWM outputs which can be used in different configurations (with single-edge operation, with dual-edge symmetric operation or one independent PWM output with dual-edge asymmetric operation) • Asynchronous override control of PWM signals during fault conditions • Programmable phase-control support for lag or lead operation relative to other EPWM modules • Dead-band generation with independent rising and falling edge delay control • Programmable trip zone allocation of both latched and un-latched fault conditions • Events enabling to trigger both CPU interrupts and start of ADC conversions Table 7-36 represents EPWM timing conditions. Table 7-36. EPWM Timing Conditions PARAMETER DESCRIPTION MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 1 4 V/ns OUTPUT CONDITIONS CL Output load capacitance 2 7 pF Section 7.10.5.7.2, Section 7.10.5.7.1 and present timing and switching characteristics for eHRPWM (see Figure 7-47, Figure 7-48, Figure 7-49, and Figure 7-46). TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1 SPRSP62 – DECEMBER 2022 www.ti.com 160 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1 |
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