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KSZ9563RNXC 数据表(PDF) 27 Page - Microchip Technology

部件名 KSZ9563RNXC
功能描述  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9563RNXC 数据表(HTML) 27 Page - Microchip Technology

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 2017-2018 Microchip Technology Inc.
DS00002419D-page 27
KSZ9563R
4.4
Switch
4.4.1
SWITCHING ENGINE
A high-performance switching engine is used to move data to and from the MAC's packet buffers. It operates in store
and forward mode, while an efficient switching mechanism reduces overall latency. The switching engine has a
256KByte internal frame buffer that is shared between all the ports.
For the majority of switch functions, all of the data ports are treated equally. However, a few functions such as IGMP
snooping, 802.1X, forwarding invalid VLAN packets, etc., give special recognition to the host port. Any port (but most
commonly port 3) may be assigned as the host port by enabling tail tagging mode for that port. Only one port may be a
host port.
When a switch receives a non-error packet, it checks the packet's destination MAC address. If the address is known,
the packet is forwarded to the output port that is associated with the destination MAC address. The following paragraphs
describe the key functions of destination address lookup and source address learning. These processes may be com-
bined with VLAN support and other features, which are described in the subsequent sub-sections.
4.4.2
ADDRESS LOOKUP
Destination address lookup is performed in three separate internal address tables in the device:
1.
Address Lookup (ALU) Table: 4K dynamic + static entries
2.
Static Address Table: 16 static entries
3.
Reserved Multicast Address Table: 8 pre-configured static entries
4.4.2.1
Address Lookup (ALU) Table
The Address Lookup (ALU) Table stores MAC addresses and their associated information. This table holds both
dynamic and static entries. Dynamic entries are created automatically in hardware, as described in Section 4.4.2.4,
"Learning". Static entries are created by management software.
This table is a 4-way associative memory, with 1K buckets, for a total of 4K entries. A hash function translates the
received packet's MAC address (and tthe FID) into a 10-bit index for accessing the table. At each bucket are four fully-
associative address entries. All four entries are simultaneously compared to the MAC address (plus FID) for a possible
match.
Three options are available for the hashing function, as described in Table 4-5. If VLAN is enabled (802.1Q VLAN
Enable bit in the Switch Lookup Engine Control 0 Register), the VLAN group (FID) is included in the hashing function
along with the MAC address. If VLAN is not enabled, the hashing function is applied to the MAC address and FID in the
default VLAN (VID=1), which is 0.
4.4.2.2
Static Address Table
The 16-entry Static Address Table is typically used to hold multicast addresses, but is not limited to this. As with static
entries in the ALU table, entries in the Static Address Table are created by management software. It serves the same
function as static entries that are created in the ALU table, so its use is optional.
TABLE 4-5:
ADDRESS LOOKUP TABLE HASHING OPTIONS
HASH_OPTION
(Switch Lookup Engine
Control 0 Register
)
Description
01b (Default)
A hash algorithm based on the CRC of the MAC address plus FID. The hash algorithm uses
the CRC-CCITT polynomial. The input to the hash is reduced to a 16-bit CRC hash value.
Bits [9:0] of the hash value plus (binary addition) 7-bit FID (zero extended on the left) are
used as an index to the table. The CRC-CCITT polynomial is: X16+X12+X5+1.
10b
An XOR algorithm based on 16 bits of the XOR of the triple-folded MAC address. Bits [9:0]
of the XOR value plus 7-bit FID (left-extended) are used to index the table.
00b or 11b
A direct algorithm. The 10 least significant bits of the MAC address plus 7 bit FID are used
to index the table.



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