KSZ9563RNXC datasheet(63/226 Pages) MICROCHIP

63 / 226 page

 2017-2018 Microchip Technology Inc.

DS00002419D-page 63

KSZ9563R

registers are shown as 16-bits or 32-bits, this is for descriptive purposes only. Data can always be written and read as

individual bytes and in any order.

For multi-byte registers, the data is addressed in a big-endian format, with the most significant byte at the lowest

address, and the least significant byte at the highest address, as shown in Figure 5-2.

The global and port register address maps are detailed in Table 5-1 and Table 5-2, respectively. Table 1-3, “Register

Nomenclature,” on page 7 provides a list of register bit type notations.

The remainder of this chapter is organized as follows:

• Global Registers

• Port Registers

• Tables and MIB Counters (Indirect Access)

• MDIO Manageable Device (MMD) Registers (Indirect)

FIGURE 5-2:

BYTE ORDERING

TABLE 5-1:

GLOBAL REGISTER ADDRESS MAP

Address

Functional Group

0x0000 - 0x00FF Global Operation Control Registers (0x0000 - 0x00FF)

0x0100 - 0x01FF Global I/O Control Registers (0x0100 - 0x01FF)

0x0200 - 0x02FF Global PHY Control and Status Registers (0x0200 - 0x02FF)

0x0300 - 0x03FF Global Switch Control Registers (0x0300 - 0x03FF)

0x0400 - 0x04FF Global Switch Look Up Engine (LUE) Control Registers (0x0400 - 0x04FF)

0x0500 - 0x05FF Global Switch PTP Control Registers (0x0500 - 0x05FF)

0x0600 - 0x0FFF RESERVED

0A0B0C0D

0A0B0

16-bit register

32-bit register

memory

address a

address a+1

address a

address a+1

address a+2

address a+3

KSZ9563RNXC 数据表(PDF) 63 Page - Microchip Technology

KSZ9563RNXC 数据表(HTML) 63 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载