KSZ9563RNXI datasheet(193/226 Pages) MICROCHIP

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DS00002419D-page 193

KSZ9563R

5.3.6.2

MIB Counter Freeze and Flush Functions

Counter freeze and flush functions are available on a port-by-port basis. Freezing or flushing counters is initiated by

setting the appropriate bit in the Switch MIB Control Register. The freeze or flush function will be applied to all ports for

which the flush and freeze functions have been enabled. To enable flush and freeze for a port, set bit 24 in the Port MIB

Control and Status Register.

The following steps show an example of how flush and freeze are used to collect MIB statistics for all ports for a period

of 1 second:

Set the MIB Flush and Freeze Enable bit 24 in the Port MIB Control and Status Register for all ports N.

Write 0x40 to the Switch MIB Control Register to freeze the MIB counters for all enabled ports.

Write 0xC0 to the Switch MIB Control Register to clear the MIB counters for all enabled ports (while continuing

to also freeze the counters).

At the beginning of the 1 second period, write 0x00 to the Switch MIB Control Register to enable the counters.

At the end of the 1 second period, write 0x40 to the Switch MIB Control Register to freeze the counters.

Read each counter for each port.

5.4

MDIO Manageable Device (MMD) Registers (Indirect)

MMD registers provide indirect read/write access to up to 32 MMD device addresses with each device supporting up to

65,536 16-bit registers, as defined in Clause 22 of the IEEE 802.3 Specification. However, the KSZ9563R uses only a

small fraction of the available registers. Refer to Table 5-7, "MMD Register Map" for a list of accessible MMD device

addresses and their associated register addresses. Detailed descriptions of the supported MMD registers are provided

in the following subsections.

The following two standard port registers serve as the portal registers to access the indirect MMD registers.

• PHY MMD Setup Register

• PHY MMD Data Register

Example: MMD Register Write

Write MMD - Device Address 2h, Register 00h = 0010h to enable single-LED mode.

Write the PHY MMD Setup Register with 0002h // Set up register address for MMD – Device Address 2h.

Write the PHY MMD Data Register with 0000h // Select Register 00h of MMD – Device Address 2h.

Write the PHY MMD Setup Register with 4002h // Select register data for MMD – Device Address 2h, Reg. 00h.

Write the PHY MMD Data Register with 0010h // Write value 0010h to MMD – Device Address 2h, Reg. 00h.

Example: MMD Register Read

Read MMD - Device Address 2h, Register 11h – 13h for the LED mode status.

Write the PHY MMD Setup Register with 0002h // Set up register address for MMD – Device Address 2h.

Write the PHY MMD Data Register with 0000h // Select Register 00h of MMD – Device Address 2h.

Write the PHY MMD Setup Register with 4002h // Select register data for MMD – Device Address 2h, Reg. 00h.

Read the PHY MMD Data Register

// Read data in MMD – Device Address 2h, Reg. 00h.

TABLE 5-7:

MMD REGISTER MAP

Device Address

(hex)

Description

00h

MMD LED Mode Register

3Ch

MMD EEE Advertisement Register

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