P9412 Datasheet

R35DS0011EU0120 Rev.1.2

Jul.6.21

Page 22

PGND

X-Align

Coil

GP5

Y-Align

Coil

GP2

R1

R2

R3

R4

C1

C2

Figure 6. Typical XY Align Coil Schematic Level Connection Guide

3.22

PCLAMP Connection

The P9412 has an internal automatic DC clamping feature to protect the device from events that cause high

voltages to occur on the AC or DC side of the rectifier. The clamping engages by the VRECT connection to the

PCLAMP pin. The VRECT node must be connected to the PCLAMP pin at all times during Rx mode operation.

For greater than 5W operation, the VRECT node is connected

to the PCLAMP pin using a 50Ω to 100Ω resistor

with greater than 1/4W rating. For space constrained designs, the PCLAMP pin can be directly connected to the

VRECT node for 5W or lower power operation. See the P9412 PCLAMP Application Note for additional design

details and component selection guidance.

3.23

Low Power Ping Detection (PDETB)

Once charging has completed the wireless power connection to the TX can be ended using an End of Power

Transfer (EPT) packet to save power. The P9412 can be used to notify the host Application Processor (AP) that

it is still on the charging pad by using the PDETB (GPOD6 pin). The PDETB pin must be externally pulled up to

the host 1.8V AP power supply rail and will be held low as long as TX PING pulses are detected. If the time

interval from the previous digital ping to the next expected digital ping is exceeded the PDETB pin will be

released to indicate to the host AP the wireless device has been removed from the Tx charging pad. Proper

operation of Ping Detect also requires 1.8V to be applied to V1P8AP and GPOD0 to be pulled- to GND.

3.24

SW Inhibit

The Software (SW) Inhibit input (GPOD5) is used to end power transfer by changing the logic level from low to

high at any time. This feature will block the P9412 from performing wireless power transfer when a logic input

high is applied to the pin. If the voltage on this pin is changed from low to high during power transfer the P9412

will send EPTs until wireless power is terminated and will no longer respond to digital pings (this can be used to

prevent USB and wireless power from simultaneously operating). When the logic level is high TRx mode will also

be blocked. The P9412 will operate normally and is always active when this pin is set to a logic low input value.

3.25

Reported Q-Factor (EPP Rx mode)

After the Rx has been placed on an EPP TX the P9412 must report its’ Q-Factor to the Tx to check for Open

FOD alarm event. The Tx will be responsible for measuring the current quality factor of the Tx coil prior to

connecting to the device and the P9412 will report the typical Q observed by the product. This will be compared

to the Tx Q-factor measured value and if within the Tx allowed range charging will commence. If outside the

allowable range the Tx will not power the Rx due to suspected presence of a Foreign Object. This feature

applies to EPP wireless power protocol and every phone or end product is likely to need some tuning to the

reported Quality Factor value. This may be programmed in one of two ways: use of two resistor dividers from

LDO1P8 to IO0 and IO1 read-back by ADC or firmware register programmed at the factory (selected by

connecting GPIO0 to GND). The simplest and recommended method is to set the value using external resistors

read by the ADC at startup to set the reported Q by HW population option (recommended) or the value can be

stored in register to be sent to the Tx (requires custom firmware programmed at factory). If the value is stored in

register each product must be able to update the MTP register on the manufacturing floor to support device

receiver type or model variations. The GPIO0 and GPIO1 pins are the inputs used to select firmware register or