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AM69AX 数据表(PDF) 109 Page - Texas Instruments |
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AM69AX 数据表(HTML) 109 Page - Texas Instruments |
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109 / 299 page  Table 6-85. Hyperlink Signal Descriptions (continued) SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALY PIN [4] HYP_TXN3 O Hyperlink TX0 (negative) AV12, AV18 HYP_TXP0 O Hyperlink TX0 (positive) AP14, AT8 HYP_TXP1 O Hyperlink TX0 (positive) AP11, AT14 HYP_TXP2 O Hyperlink TX0 (positive) AT17, AV10 HYP_TXP3 O Hyperlink TX0 (positive) AV13, AV19 Table 6-86. Hyperlink0 Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALY PIN [4] HYP0_RXFLCLK O Hyperlink Flow Management Receive Clock AK35 HYP0_RXFLDAT O Hyperlink Flow Management Receive Data AK38 HYP0_RXPMCLK I Hyperlink Power Management Receive Clock AC36 HYP0_RXPMDAT I Hyperlink Power Management Receive Data AE36 HYP0_TXFLCLK I Hyperlink Flow Management Transmit Clock AF37 HYP0_TXFLDAT I Hyperlink Flow Management Transmit Data AG37 HYP0_TXPMCLK O Hyperlink Power Management Transmit Clock AD37 HYP0_TXPMDAT O Hyperlink Power Management Transmit Data AE37 Table 6-87. Hyperlink1 Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALY PIN [4] HYP1_RXFLCLK O Hyperlink Flow Management Receive Clock AK33 HYP1_RXFLDAT O Hyperlink Flow Management Receive Data AK37 HYP1_RXPMCLK I Hyperlink Power Management Receive Clock AC32 HYP1_RXPMDAT I Hyperlink Power Management Receive Data AC37 HYP1_TXFLCLK I Hyperlink Flow Management Transmit Clock AD36 HYP1_TXFLDAT I Hyperlink Flow Management Transmit Data AJ32 HYP1_TXPMCLK O Hyperlink Power Management Transmit Clock AJ37 HYP1_TXPMDAT O Hyperlink Power Management Transmit Data AK34 6.3.19 PCIE 6.3.19.1 MAIN Domain Table 6-88. PCIE Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALY PIN [4] PCIE0_CLKREQn IO PCIE Clock Request Signal AC34 PCIE1_CLKREQn IO PCIE Clock Request Signal AC38, AR38 PCIE2_CLKREQn IO PCIE Clock Request Signal AB38, AL33 PCIE3_CLKREQn IO PCIE Clock Request Signal AB36, AL34 PCIE0_RXN0 I SERDES_PCIE Differential Receive Data (negative) AU5 PCIE0_RXN1 I SERDES_PCIE Differential Receive Data (negative) AT4 PCIE0_RXN2 I SERDES_PCIE Differential Receive Data (negative) AU2 PCIE0_RXN3 I SERDES_PCIE Differential Receive Data (negative) AT1 PCIE0_RXP0 I SERDES_PCIE Differential Receive Data (positive) AU6 PCIE0_RXP1 I SERDES_PCIE Differential Receive Data (positive) AT5 PCIE0_RXP2 I SERDES_PCIE Differential Receive Data (positive) AU3 PCIE0_RXP3 I SERDES_PCIE Differential Receive Data (positive) AT2 PCIE0_TXN0 O SERDES_PCIE Differential Transmit Data (negative) AV6 www.ti.com AM69A SPRSP92 – FEBRUARY 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 109 Product Folder Links: AM69A |
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