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M28W320CT 数据表(PDF) 11 Page - STMicroelectronics |
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M28W320CT 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 42 page  11/42 M28W320CT, M28W320CB Table 11. Protection States (1) Note: 1. All blocks are protected at power-up, so the default configuration is 001 or 101 according to WP status. 2. Current state and Next state gives the protection status of a block. The protection status is defined by the write protect pin and by DQ1 (= 1 for a locked block) and DQ0 (= 1 for a protected block) as read in the Read Electronic Signature instruction with A1 = VIH and A0 = VIL. 3. Next state is the protection status of a block after a Protect or Unprotect or Lock command has been issued or after WP has changed its logic value. 4. A WP transition to VIH on a locked block will restore the previous DQ0 value, giving a 111 or 110. Table 12. Status Register Bits Note: Logic level ’1’ is High, ’0’ is Low. Current State (2) Next State After Event (3) (WP, DQ1, DQ0) Program/Erase Allowed Protect Unprotect Lock WP transition 100 yes 101 100 111 000 101 no 101 100 111 001 110 yes 111 110 111 011 111 no 111 110 111 011 000 yes 001 000 011 100 001 no 001 000 011 101 011 no 011 011 011 111 or 110 (4) Mnemonic Bit Name Logic Level Definition Note P/ECS 7 P/E.C. Status ’1’ Ready Indicates the P/E.C. status, check during Program or Erase, and on completion before checking bits b4 or b5 for Program or Erase Success. ’0’ Busy ESS 6 Erase Suspend Status ’1’ Suspended On an Erase Suspend instruction P/ECS and ESS bits are set to ’1’. ESS bit remains ’1’ until an Erase Resume instruction is given. ’0’ In progress or Completed ES 5 Erase Status ’1’ Erase Error ES bit is set to ’1’ if P/E.C. has applied the maximum number of erase pulses to the block without achieving an erase verify. ’0’ Erase Success PS 4 Program Status ’1’ Program Error PS bit set to ’1’ if the P/E.C. has failed to program a word. ’0’ Program Success VPPS 3 VPP Status ’1’ VPP Invalid, Abort VPPS bit is set if the VPP voltage is below VPPLK when a Program or Erase instruction is executed. VPP is sampled only at the beginning of the erase/program operation. ’0’ VPP OK PSS 2 Program Suspend Status ’1’ Suspended On a Program Suspend instruction P/ECS and PSS bits are set to ’1’. PSS remains ’1’ until a Program Resume Instruction is given. ’0’ In Progress or Completed BPS 1 Block Protection Status ’1’ Program/Erase on protected Block, Abort BPS bit is set to ’1’ if a Program or Erase operation has been attempted on a protected block. ’0’ No operation to protected blocks 0 Reserved |
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