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M28W320CT 数据表(PDF) 19 Page - STMicroelectronics |
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M28W320CT 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 42 page ![]() 19/42 M28W320CT, M28W320CB Table 18. Primary Algorithm-Specific Extended Query Table Table 19. Security Code Area Offset Data Description (P)h = 35h 0050h Primary Algorithm extended Query table unique ASCII string “PRI” 0052h 0049h (P+3)h = 38h 0031h Major version number, ASCII (P+4)h = 39h 0030h Minor version number, ASCII (P+5)h = 3Ah 0006h Extended Query table contents for Primary Algorithm bit 0 Chip Erase supported (1 = Yes, 0 = No) bit 1 Erase Suspend supported (1 = Yes, 0 = No) bit 2 Program Suspend (1 = Yes, 0 = No) bit 3 Lock/Unlock supported (1 = Yes, 0 = No) bit 4 Quequed Erase supported (1 = Yes, 0 = No) bit 31 to 5 Reserved; undefined bits are ‘0’ 0000h (P+7)h 0000h (P+8)h 0000h (P+9)h = 3Eh 0001h Supported Functions after Suspend Read Array, Read Status Register and CFI Query are always supported during Erase or Program operation bit 0 Program supported after Erase Suspend (1 = Yes, 0 = No) bit 7 to 1 Reserved; undefined bits are ‘0’ (P+A)h = 3Fh 0000h Block Lock Status Defines which bits in the Block Status Register section of the Query are implemented. bit 0 Block Lock Status Register Lock/Unlock bit active (1 = Yes, 0 = No) bit 1 Block Lock Status Register Lock-Down bit active (1 = Yes, 0 = No) bit 15 to 2 Reserved for future use; undefined bits are ‘0’ (P+B)h 0000h (P+C)h = 41h 0027h VDD Logic Supply Optimum Program/Erase voltage (highest performance) bit 7 to 4 HEX value in volts bit 3 to 0 BCD value in 100 mV (P+D)h = 42h 00C0h VPP Supply Optimum Program/Erase voltage bit 7 to 4 HEX value in volts bit 3 to 0 BCD value in 100 mV (P+E)h 0000h Reserved Offset Data Description 80h 00XX Protection Register Lock 81h XXXX 64 bits: unique device number 82h XXXX 83h XXXX 84h XXXX 85h XXXX 64 bits: User Programmable OTP 86h XXXX 87h XXXX 88h XXXX |
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