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STM32G0C1NET6XTR 数据表(PDF) 21 Page - STMicroelectronics |
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STM32G0C1NET6XTR 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 159 page  DS13564 Rev 4 21/159 STM32G0C1xC/xE Functional overview 36 Table 4. Interconnect of peripherals Interconnect source Interconnect destination Interconnect action TIMx TIMx Timer synchronization or chaining Y Y - ADCx DACx Conversion triggers Y Y - DMA Memory-to-memory transfer trigger Y Y - COMPx Comparator output blanking Y Y - COMPx TIM1,2,3,4 Timer input channel, trigger, break from analog signals comparison YY - LPTIMERx Low-power timer triggered by analog signals comparison YY Y ADCx TIM1 Timer triggered by analog watchdog Y Y - RTC TIM16 Timer input channel from RTC events Y Y - LPTIMERx Low-power timer triggered by RTC alarms or tampers YY Y All clock sources (internal and external) TIM14,16,17 Clock source used as input channel for RC measurement and trimming YY - CSS RAM (parity error) Flash memory (ECC error) COMPx PVD TIM1,15,16,17 Timer break Y Y - CPU (hard fault) TIM1,15,16,17 Timer break Y - - GPIO TIMx External trigger Y Y - LPTIMERx External trigger Y Y Y ADC DACx Conversion external trigger Y Y - |
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