STM32G0C1NET3 datasheet(28/159 Pages) STMICROELECTRONICS

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Functional overview

STM32G0C1xC/xE

28/159

DS13564 Rev 4

3.19

Advanced-encryption-standard (AES) hardware accelerator

The embedded AES hardware accelerator can encipher or decipher data, using AES

algorithm.

Features of AES:

•

Encryption/decryption using AES Rijndael Block Cipher algorithm

•

NIST-FIPS-197-compliant implementation of AES encryption/decryption algorithm

•

128-bit and 256-bit register for storing the encryption, decryption or derivation key (four

32-bit registers)

•

Electronic codebook (ECB), cipher block chaining (CBC), counter (CTR), Galois

counter (GCM), Galois message authentication code (GMAC) and cipher message

authentication code (CMAC) modes supported

•

Key scheduler

•

Key derivation for decryption

•

128-bit data block processing

•

128-bit and 256-bit key length

•

32-bit input and output buffers

•

128-bit register for the initialization vector when AES is configured in CBC mode or for

the 32-bit counter initialization when CTR mode is selected, GCM mode or CMAC

mode

•

Automatic data flow control with support of direct memory access (DMA) using 2

channels, one for incoming data, the other for outcoming data

•

Message processing suspend to process another message with higher priority

3.20

Timers and watchdogs

The device includes an advanced-control timer, seven general-purpose timers, two basic

timers, two low-power timers, two watchdog timers and a SysTick timer. Table 7 compares

features of the advanced-control, general-purpose and basic timers.

Table 7. Timer feature comparison

Timer type

Timer

Counter

resolution

Counter

type

Maximum

operating

frequency

Prescaler

factor

DMA

request

generation

Capture/

compare

channels

Comple-

mentary

outputs

Advanced-

control

TIM1

16-bit

Up, down,

up/down

128 MHz

Integer from

1 to 216

Yes

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