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80KSW0004 数据表(PDF) 12 Page - Renesas Technology Corp |
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80KSW0004 数据表(HTML) 12 Page - Renesas Technology Corp |
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12 / 48 page ![]() 12 of 47 March 31, 2008 IDT80KSW0004 Datasheet 13 I2C-Bus The CPS-12 is compliant with the I2C specification [1]. This specification provides all functional detail and electrical specifications associated with the I2C bus. This includes signaling, addressing, arbitration, AC timing, DC specifications, and other details. The I2C bus is comprised of Serial Data (SDA) and Serial Clock (SCL) pins. It can be used to attach a CPU or a configuration memory. The I2C interface supports Fast/Standard (F/S) mode (400/ 100 kHz). I2C master mode and slave mode The CPS-12 device supports both master mode and slave mode. It’s selected by MM static configuration pin. Refer to following for signaling and operation. I2C Device Address The device address for the CPS-12 is fully pin-defined by 10 external pins while in slave mode. This provides full flexibility in defining the slave address to avoid conflicting with other I2C devices on a given bus. The CPS-12 may be operated as either a 10-bit addressable device or a 7-bit addressable device based on another external pin, address select (ADS). If the ADS pin is tied to Vdd, then the CPS-12 operates as a 10-bit addressable device and the device address will be defined as ID[9:0]. If the ADS pin is tied to GND, then the CPS-12 operates as a 7-bit addressable device with the device address defined by ID[6:0]. The addressing mode must be established at power-up and remain static throughout operation. Dynamic changes will result in undetermined behavior. Table 8 I2C static address selection pin configuration All of the CPS-12’s registers are addressable through I2C. These registers are accessed via 22-bit addresses and 32-bit word boundaries though standard reads and writes. These registers may also be accessed through the sRIO and JTAG interfaces. Signaling Communication with the CPS-12 on the I2C bus follows these three cases: 1) Suppose a master device wants to send information to the CPS-12: – Master device addresses CPS-12 (slave) – Master device (master-transmitter), sends data to CPS-12 (slave- receiver) – Master device terminates the transfer 2) If a master device wants to receive information from the CPS-12: – Master device addresses CPS-12 (slave) – Master device (master-receiver) receives data from CPS-12 (slave- transmitter) – Master device terminates the transfer. Pin I2C Address Bit (pin_addr) ID0 0 ID1 1 ID2 2 ID3 3 ID4 4 ID5 5 ID6 6 ID7 7 (don’t care in 7-bit mode) ID8 8 (don’t care in 7-bit mode) ID9 9 (don’t care in 7-bit mode) |
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