6

I2C interface

The STWBC86 can operate fully independently, i.e. without being interfaced with a host system.

In applications in which the STWBC86 has to be a part of peripherals managed by the host system, the two SDA

and SCL pins could be connected to the existing I²C bus.

The device works as an I²C slave and supports standard (100 kbps) fast (400 kbps) data transfer modes.

The STWBC86 has been assigned 0x61, a 7-bit hardware address. The pull-up resistors should be selected as

a trade-off between communication speed (lower resistors lead to faster edges) and data integrity (the input logic

levels have to be guaranteed to preserve communication reliability).

When the bus is idle, both SDA and SCL lines are pulled HIGH.

Data Validity

The data on the SDA line must be stable during the high period of the clock. The high and low states of the SDA

line can only change when the SCL clock signal is low.

Start and Stop Conditions

Both the SDA and the SCL lines remain high when the I2C bus is not busy. A START condition is a high-to-low

transition of the SDA line when SCL is HIGH, while the STOP condition is a low-to-high transition of the SDA line

when SCL is HIGH. A STOP condition must be sent before each START condition.

Figure 6. Start and Stop Condition on the I2C Bus

Byte format

Every byte transferred over the SDA line must contain 8 bits. Each byte received by the STWBC86 generally is

followed by an acknowledge (ACK) bit. The MSB is transferred first. One data bit is transferred during each clock

pulse. The data on the SDA line must remain stable during the high state of each SCL clock pulse.

The device generates the ACK pulse (by pulling-down the SDA line during the acknowledge clock pulse) to

confirm the correct device address or received data bytes.

Interface protocol

The interface protocol consists of

•

Start condition (START)

•

7-bit device address (0x61) + R/W bit (read = 1 / write = 0)

•

Register pointer, high-byte

•

Register pointer, low-byte

•

Data sequence: N x (data byte + ACK)

•

Stop condition (STOP)

The register pointer (or address) byte defines the destination register to which the read or write operation applies.

When the read or write operation is finished, the register pointer is automatically incremented.

STWBC86

I2C interface

DS14079 - Rev 1

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