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Data Sheet A17989EE2V0DS00

µPD800261

(1)

LBU Read from ERTEC 200 with Separate Read/Write line (LBU_RDY_N active low)

TA = -40 to +85°C, VDDCore = 1.35 V ~ 1.65 V, VDDIO = 3.0 V ~ 3.6 V

Figure 2-4:

LBU Read from ERTEC 200 with Separate Read/Write line

Table 2-6: LBU Read from ERTEC 200 with Separate Read/Write line

Parameter

Symbol

Condition

MIN.

MAX.

Unit

Chip select asserted to read pulse

asserted delay

tCSRS

-0

Address valid to read pulse asserted

setup time

tARS

-0

Read pulse asserted to ready enabled

delay

tRRE

Read pulse asserted to data enable

delay

tRDE

Ready active pulse width

tRAP

-17

Ready asserted to data valid delay

tRTD

Read pulse deasserted to chip select

deasserted delay

tRCSH

-0

Address valid to read pulse deasserted

hold time

tRAH

-0

Data valid/enabled to read pulse deas-

serted hold time

tRDH

Read recovery time

tRR

-25

LBU_CS_R_N/

LBU_CS_M_N

LBU_RD_N

LBU_A(20:0)/

LBU_SEG(1:0)/

LBU_BE(1:0)_N

LBU_RDY_N

LBU_D(15:0)

CSRS

ARS

RRE

RDE

RAP

RTD

RDH

RAH

RCSH

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