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Data Sheet A17989EE2V0DS00

µPD800261

(4)

LBU Write to ERTEC 200 with Common Read/Write line (LBU_RDY_N active low)

TA = -40 to +85°C, VDDCore = 1.35 V ~ 1.65 V, VDDIO = 3.0 V ~ 3.6 V

Figure 2-7:

LBU Write to ERTEC 200 with Common Read/Write line

Table 2-9: LBU Write to ERTEC 200 with Common Read/Write line

Parameter

Symbol

Condition

MIN.

MAX.

Unit

Write signal asserted to chip select

setup time

tWCS

-2

Address valid to chip select asserted

setup time

tACS

-0

Chip select asserted to ready enabled

delay

tCRE

Chip select asserted to data valid delay

tCDV

Ready active pulse width

tRAP

-17

Write signal deasserted to chip select

deasserted hold time

tCWH

-0

Address hold time after chip select deas-

serted

tCAH

-0

Ready asserted to chip select deas-

serted delay

tRTC

-0

Data valid/enabled to chip select deas-

serted hold time

tCDH

-0

Write recovery time

tWR

-25

LBU_CS_R_N/

LBU_CS_M_N

LBU_WR_N

LBU_A(20:0)/

LBU_SEG(1:0)/

LBU_BE(1:0)_N

LBU_RDY_N

LBU_D(15:0)

WCS

ACS

CRE

CDV

RTC

RAP

CWH

CAH

CDH

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