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ERTEC 数据表(PDF) 19 Page - Renesas Technology Corp |
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ERTEC 数据表(HTML) 19 Page - Renesas Technology Corp |
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19 / 51 page ![]() 19 Data Sheet A17989EE2V0DS00 µPD800261 Table 1-6: UART Pin Functions Pin Name I/ONote Function Alternate FunctionNote UART-TXD O UART transmit data output GPIO8 UART-RXD I UART receive data input GPIO9 UART-DCD_N I UART carrier detection signal GPIO10 UART-DSR_N I UART data set ready signal GPIO11 UART-CTS_N I UART transmit enable signal GPIO12 Note: Primary and alternate functions are selected with the GPIO_PORT_MODE_H and GPIO_PORT_MODE_L registers. In this table the I/O types are listed for the UART function. Table 1-7: SPI1 Pin Functions Pin Name I/ONote Function Alternate FunctionNote SPI1_SSPRXD I SPI1 receive data input GPIO18 SPI1_SSPTXD O SPI1 transmit data output GPIO19 SPI1_SCLKOUT O SPI1 clock output GPIO20 SPI1_SFRMOUT O SPI1 serial frame output signal GPIO21 SPI1_SFRMIN I SPI1 serial frame input signal GPIO22, DBGACK SPI1_SCLKIN I SPI1 clock input GPIO23 SPI1_SSPCTLOE O SPI1 clock and serial frame output enable GPIO16 SPI1_SSPOE O SPI1 output enable GPIO17 Note: Primary and alternate functions are selected with the GPIO_PORT_MODE_H and GPIO_PORT_MODE_L registers. In this table the I/O types are listed for the SPI1 function. Table 1-8: MC_PLL Pin Functions Pin Name I/ONote 1 Function Alternate FunctionNote 1 PLL_EXT_IN_N I MC_PLL input signal GPIO24 TGEN_OUT1_N O MC_PLL output signalNote 2 GPIO25 Notes: 1. Primary and alternate functions are selected with the GPIO_PORT_MODE_H register. In this table the I/O types are listed for the MC_PLL function. 2. For a PROFINET IRT application, GPIO25 must be configured as TGEN_OUT1_N output pin. A syn- chronous clock signal is then output at this pin; during certification of a PROFINET IO device with IRT support this signal must be accessible from the outside. |
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