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P9242-R 数据表(PDF) 19 Page - Renesas Technology Corp |
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P9242-R 数据表(HTML) 19 Page - Renesas Technology Corp |
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19 / 38 page ![]() P9242-R Datasheet © 2018 Integrated Device Technology, Inc 19 January 16, 2018 7.10 Input Voltage Requirement The P9242-R can support an input voltage ranging from 4.5V to 21V. However, since the transmitter is compliant with WPC’s MP-A2 coil configuration, the input voltage is restricted to 10V to 14V with a nominal voltage of 12V. 7.11 Integrated Step-Down Regulator The input capacitors (C14 and C15 in Figure 25) must be connected as close as possible between the VIN pin and GND pin. Similarly, the output capacitor (C4 and C5 in Figure 25) must be placed close to the inductor and GND. The output voltage is sensed by the VIN_LDO pin; therefore, the connection from the step-down output (VCC_5V; see Figure 25) to the VIN_LDO pin should be made as wide and short as possible to minimize output voltage errors. The step-down regulator is the input voltage to the LDO18 and LDO33 linear regulators and is not recommended for powering an external load. 7.12 Integrated Linear Regulators – PREG, LDO33, and LDO18 The P9242 has three low-dropout (LDO) regulators used to bias the internal circuitry. The 5V pre-regulator (PREG) provides bias for the entire internal power management. The PREG requires a 1μF ceramic bypass capacitor connected from the PREG pin to GND. This capacitor must be placed very close to the PREG pin. The voltage regulator must not be externally loaded. The LDO33 and LDO18 are used to bias the internal digital circuit. The regulator’s input voltage is supplied through the VIN_LDO pin. Both regulators require a 1μF ceramic capacitor from the pin to GND. The voltage regulators must not be externally loaded. 7.13 Under-Voltage Lock-Out (UVLO) Protection The P9242-R has 4V (typical, rising) under-voltage lockout circuit on the VIN pin. To guarantee proper functionality, the voltage on the VIN pin must rise above the UVLO threshold. If the input voltage stays below the UVLO threshold, the P9242-R is in Shut Down Mode. Figure 17. UVLO Threshold Definition Shut Down Mode Shut Down Mode Normal Operating Mode Time VIN_UVHYS VIN_UVLO |
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