ADL8112ACCZ-R7 datasheet(26/27 Pages) AD

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Data Sheet

ADL8112

APPLICATIONS INFORMATION

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Rev. 0 | 26 of 27

RECOMMENDED POWER MANAGEMENT

CIRCUIT

Figure 84 shows a recommended power management circuit that

uses the MAX1697 inverting charge pump, the MAX17651 linear

regulator, and the LT3042 linear regulator. The LT3042 linear regu-

lator is used to step down the 12 V input voltage to a low noise 8.5

V output to VDD1 for the ADL8112.

The output voltage for the LT3042 is set by the R4 resistor connect-

ed to the SET pin, according to the following equation:

R4 = (OUT/100 μA)

(1)

The PGFB resistors are chosen to trigger the power-good (PG)

signal when the output is under 95% of the target voltage of 8.5 V.

The OUT pin of the LT3042 has a 1% initial tolerance and another

1% variation over temperature. The PGFB tolerance is roughly 3%

over temperature, and adding resistors results in a bit more (5%).

Therefore, putting 5% between the OUT pin and the PGFB works

well. In addition, the PG open collector is pulled up to the 8.5 V

output to produce a convenient 0 V to 8.5 V voltage range.

The MAX17651 linear regulator is used to provide a 3.3 V input

voltage to the MAX1697 inverting charge pump and a 3.3 V output

voltage to the VSS2 for the ADL8112. The switching frequency for

the MAX1697 is set to 250 kHz by the 1 μF capacitor, which sets

the minimum output resistance to 12 Ω. The MAX1697 data sheet

provides capacitor selector tables that can be used to select other

switching frequencies ranging from 12 kHz to 250 kHz.

The output voltage for the MAX17651 is set by the R1 and R2

resistors connected to the OUT and FB pins, according to the

following equation:

R1 = R2 × (((IN/OUT) − 1))

Figure 84. Power Management Circuit Schematic

ADL8112ACCZ-R7 数据表(PDF) 26 Page - Analog Devices

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