AD9411SLASHPCB datasheet(21/28 Pages) AD

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AD9411

Rev. A | Page 21 of 28

EVALUATION BOARD

The AD9411 evaluation board offers an easy way to test the

AD9411 in LVDS mode. It requires a clock source, an analog

input signal, and a 3.3 V power supply. The clock source is

buffered on the board to provide the clocks for the ADC,

latches, and a data-ready signal. The digital outputs and output

clocks are available at a 40-pin connector, P23. The board has

several different modes of operation and is shipped in the

following configurations:

•

Offset binary

•

Internal voltage reference

•

Full-scale adjust = low

POWER CONNECTOR

Power is supplied to the board via a detachable 12-lead power

strip (three 4-pin blocks).

Table 8. Power Connector, LVDS Mode

AVDD1 3.3 V

Analog Supply for ADC (350 mA)

DRVDD1 3.3 V

Output Supply for ADC (50 mA)

VDL1 3.3 V

Supply for Support Logic

VCLK/V_XTAL

Supply for Clock Buffer/Optional XTAL

EXT_VREF2

Optional External Reference Input

1 AVDD, DRVDD, and VDL are the minimum required power connections.

2 LVEL16 clock buffer can be powered from AVDD or VCLK at E47 jumper.

ANALOG INPUTS

The evaluation board accepts a 1.3 V p-p analog input signal

centered at ground at SMB connector J4. This signal is

terminated to ground through 50 Ω by R16. The input can be

alternatively terminated at the T1 transformer secondary by

R13 and R14. T1 is a wideband RF transformer that provides a

single-ended-to-differential conversion, allowing the ADC to be

driven differentially, which minimizes even-order harmonics.

An optional second transformer, T2, can be placed following T1

if desired. This provides some performance advantage (~1 dB to

2 dB) for high analog input frequencies (>100 MHz). If T2 is

placed, cut the two shorting traces at the pads. The analog

signal can be low-pass filtered by R41, C12 and R42, C13 at the

ADC input. The footprint for transformer T2 can be modified

to accept a wideband differential amplifier (AD8351) for low

frequency applications where gain is required. See the PCB

schematic for more information.

GAIN

Full scale is set at E17–E19, E17–E18 sets S5 low, full scale =

1.5 V differential; E17–E19 sets S5 high, full scale = 0.75 V

differential. Best performance is obtained at 1.5 V full scale.

CLOCK

The clock input is terminated to ground through 50 Ω resistor

at SMB connector J5. The input is ac-coupled to a high speed

differential receiver (LVEL16) that provides the required low

jitter, fast edge rates needed for optimum performance. J5 input

should be > 0.5 V p-p. Power to the LVEL16 is set at Jumper

E47. E47–E45 powers the buffer from AVDD; E47–E46 powers

the buffer from VCLK/V_XTAL.

VOLTAGE REFERENCE

The AD9411 has an internal 1.23 V voltage reference. The ADC

uses the internal reference as the default when Jumpers E24–E27

and E25–E26 are left open. The full scale can be increased by

placing an optional resistor (R3). The required value varies with

the process and needs to be tuned for the specific application.

Full scale can similarly be reduced by placing R4; tuning is

required here as well. An external reference can be used by

shorting the SENSE pin to 3.3 V (place Jumper E26–E25).

Jumper E27–E24 connects the ADC VREF pin to the

EXT_VREF pin at the power connector.

DATA FORMAT SELECT

Data format select (DFS) sets the output data format of the

ADC. Setting DFS (E1–E2) low sets the output format to be

offset binary; setting DFS high (E1–E3) sets the output to twos

complement.

DATA OUTPUTS

The ADC LVDS digital outputs are routed directly to the

connector at the card edge. Resistor pads placed at the output

connector allow for termination if the connector receiving logic

lack the differential termination for the data bits and DCO.

Each output trace pair should be terminated differentially at

the far end of the line with a single 100 ohm resistor.

CLOCK XTAL

An optional XTAL oscillator can be placed on the board to

serve as a clock source for the PCB. Power to the XTAL is

through the VCLK/VXTAL pin at the power connector. If an

oscillator is used, ensure proper termination for best results.

The board was tested with a Valpey Fisher VF561 and a Vectron

JN00158-163.84.

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