ICS1893AF datasheet(7/137 Pages) RENESAS

7 / 137 page

Table of Contents

ICS1893AF, Rev. D 10/26/04

October, 2004

ICS1893AF Data Sheet - Release

Table of Contents

Section

Title

Page

8.14

8.14.1

Node/Repeater Configuration (bit 19.15) ...............................................................97

8.14.2

Hardware/Software Priority Status (bit 19.14) ........................................................ 97

8.14.3

Remote Fault (bit 19.13) ........................................................................................ 97

8.14.4

ICS Reserved (bits 19.12:8) ................................................................................... 97

8.14.5

Twisted Pair Tri-State Enable, TPTRI (bit 19.7) ..................................................... 97

8.14.6

ICS Reserved (bits 19.6:1) ..................................................................................... 97

8.14.7

Automatic 100Base-TX Power-Down (bit 19.0) ..................................................... 97

Chapter 9

Pin Diagram, Listings, and Descriptions ....................................................................... 98

9.1

ICS1893AF Pin Diagram ........................................................................................ 98

9.2

ICS1893AF Pin Descriptions ................................................................................. 99

9.2.1

Transformer Interface Pins ................................................................................... 100

9.2.2

Multi-Function (Multiplexed) Pins: PHY Address and LED Pins ........................... 101

9.2.3

Configuration Pins................................................................................................. 104

9.2.4

MAC Interface Pins ............................................................................................... 105

9.2.5

Ground and Power Pins........................................................................................ 109

Chapter 10

DC and AC Operating Conditions............................................................................... 110

10.1

Absolute Maximum Ratings ................................................................................. 110

10.2

Recommended Operating Conditions .................................................................. 110

10.3

Recommended Component Values ..................................................................... 111

10.4

DC Operating Characteristics .............................................................................. 112

10.4.1

DC Operating Characteristics for Supply Current ................................................112

10.4.2

DC Operating Characteristics for TTL Inputs and Outputs .................................. 112

10.4.3

DC Operating Characteristics for REF_IN ........................................................... 113

10.4.4

DC Operating Characteristics for Media Independent Interface .......................... 113

10.5

Timing Diagrams .................................................................................................. 114

10.5.1

Timing for Clock Reference In (REF_IN) Pin ....................................................... 114

10.5.2

Timing for Transmit Clock (TXCLK) Pins .............................................................115

10.5.3

Timing for Receive Clock (RXCLK) Pins .............................................................. 116

10.5.4

100M MII: Synchronous Transmit Timing .............................................................117

10.5.5

10M MII: Synchronous Transmit Timing .............................................................. 118

10.5.6

100M/MII Media Independent Interface: Synchronous Receive Timing ............... 119

10.5.7

MII Management Interface Timing ....................................................................... 120

10.5.8

10M Media Independent Interface: Receive Latency ........................................... 121

10.5.9

10M Media Independent Interface: Transmit Latency........................................... 122

10.5.10

100M/MII Media Independent Interface: Transmit Latency...................................123

10.5.11

100M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)................124

10.5.12

10M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission).................. 125

10.5.13

100M MII Media Independent Interface: Receive Latency.................................... 126

ICS1893AF 数据表(PDF) 7 Page - Renesas Technology Corp

ICS1893AF 数据表(HTML) 7 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载