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ICS1893AFILF 数据表(PDF) 30 Page - Renesas Technology Corp

部件名 ICS1893AFILF
功能描述  3.3-V 10Base-T/100Base-TX Integrated PHYceiver
PDF  137 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

ICS1893AFILF 数据表(HTML) 30 Page - Renesas Technology Corp

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ICS1893AF, Rev D 10/26/04
October, 2004
30
Chapter 6
Interface Overviews
ICS1893AF Data Sheet - Release
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
If a crystal is used as the clocking source, connect it to both the Ref_in (pin 47) and Ref_out (pin 46) pins
of the ICS1893AF. A pair of bypass capacitors on either side of the crystal are connected to ground. The
crystal is used in the parallel resonance or anti-resonance mode. The value of the bypass caps serve to
adjust the final frequency of the crystal oscillation. Typical applications would use 33pF bypass caps. The
exact value will be affected by the board routing capacitance on Ref_in and Ref_out pins. Smaller bypass
capacitors raise the frequency of oscillation. Once the exact value of bypass capacitance is established it
will be the same for all boards using the same specification crystal. The best way to measure the crystal
frequency is to measure the frequency of TXCLK (pin 37) using a frequency counter with a 10 second
sample. Using TXCLK prevents affecting the crystal frequency by the measurement. The crystal
specification is shown in Table 6.1.
Table 6-1.
25MHz Crystal Specification
Specifications
Symbol Minimum
Typical Maximum
Unit
Fundamental Frequency
(tolerance is sum of freq.,
temp., stability and aging.)
F0
24.99875 25.00000
25.00125
MHz
Freq. Tolerance
∆F/f
± 50
ppm
Input Capacitance
CIN
3
pF
Table 6-2.
25MHz Oscillator Specification
Specifications
Symbol Minimum
Typical Maximum
Unit
Output Frequency
F0
24.99875 25.00000
25.00125
MHz
Freq. Stability (including aging)
∆F/f
± 50
ppm
Duty cycle CMOS level
one-half VDD
Tw/T
35
65
%
VIH
2.79
Volts
VIL
0.33
Volts
Period Jitter
Tjitter
500
pS
Input Capacitance
CIN
3
pF



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