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ICS1893AFILF 数据表(PDF) 32 Page - Renesas Technology Corp |
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ICS1893AFILF 数据表(HTML) 32 Page - Renesas Technology Corp |
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32 / 137 page  ICS1893AF, Rev D 10/26/04 October, 2004 32 Chapter 6 Interface Overviews ICS1893AF Data Sheet - Release Copyright © 2004, Integrated Circuit Systems, Inc. All rights reserved. Figure 6-4 shows typical biasing and LED connections for the ICS1893AF. Figure 6-4. ICS1893AF LED - PHY Interface ICS1893AF 10K Ω 86 4 3 1 P4RD P3TD P2LI P1CL P0AC REC TRANS LINK ACTIVITY 10K Ω LED 1K Ω 10K Ω LED 1K Ω 10K Ω VDD COL LED 1K Ω 10K Ω This circuit decodes to PHY address = 1. Notes: 1. All LED pins must be set during reset. 2. Caution: PHY address 00 tri-states the MII interface. Don’t use PHY address 00. 3. For more reliable address capture during power-on reset, add a 10K Ω resistor across the LED. |
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