PCF2104CUSLASH2 datasheet(5/56 Pages) MOTOROLA

5 / 56 page

1997 Dec 16

Philips Semiconductors

Product speciﬁcation

LCD controller/driver

PCF2104x

PINNING

SYMBOL

FFC PAD

TYPE

DESCRIPTION

OSC

oscillator/external clock input

VDD

logic supply voltage

SA0

I2C-bus address pin input

VSS

ground

R8 to R5

5 to 8

LCD row driver outputs

R32 to R29

9 to12

LCD row driver outputs

R24 to R17

13 to 20

LCD row driver outputs

C60 to C1

21 to 80

LCD column driver outputs

R9 to R16

81 to 88

LCD row driver outputs

R25 to R28

89 to 92

LCD row driver outputs

R1 to R4

93 to 96

LCD row driver outputs

SCL

I2C-bus serial clock input

data bus clock input

R/W

100

read/write input

101

test pad input

DB7 to DB0

102 to 109

I/O

8-bit bidirectional data bus input/output

SDA

110

I/O

I2C-bus serial data input/output

VLCD

111

LCD supply voltage input

PIN FUNCTIONS

7.1

RS: register select (parallel control)

RS selects the register to be accessed for read and write

when the device is controlled by the parallel interface.

RS = logic 0 selects the instruction register for write and

the Busy Flag and Address Counter for read. RS = logic 1

selects the data register for both read and write. There is

an internal pull-up on pin RS.

7.2

R/W: read/write (parallel control)

R/W selects either the read (R/W = logic 1) or write

(R/W = logic 0) operation when control is by the parallel

interface. There is an internal pull-up on this pin.

7.3

E: data bus clock (parallel control)

The E pin is set HIGH to signal the start of a read or write

operation when the device is controlled by the parallel

interface. Data is clocked in or out of the chip on the

negative edge of the clock. Note that this pin must be tied

to logic 0 (VSS) when I2C-bus control is used.

7.4

DB0 to DB7: data bus (parallel control)

The bidirectional, 3-state data bus transfers data between

the system controller and the PCF2104x. DB7 may be

used as the Busy Flag, signalling that internal operations

are not yet completed. In 4-bit operations the 4 higher

order lines DB4 to DB7 are used; DB0 to DB3 must be left

open circuit. There is an internal pull-up on each of the

data lines. Note that these pins must be left open circuit

when I2C-bus control is used.

7.5

C1 to C60: column driver outputs

These pins output the data for pairs of columns.

This arrangement permits optimized chip-on-glass (COG)

layout for 4-line by 12 characters.

7.6

R1 to R32: row driver outputs

These pins output the row select waveforms to the left and

right halves of the display.

7.7

VLCD: LCD power supply

Negative power supply for the liquid crystal display.

PCF2104CU/2 数据表(PDF) 5 Page - Motorola, Inc

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PCF2104CU/2 数据表(PDF) 5 Page - Motorola, Inc

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