PCF2104CUSLASH2 datasheet(19/56 Pages) MOTOROLA

19 / 56 page

Table 3

Instructions (note 1)

Notes

1. In the I2C-bus mode the DL bit is don't care. 8-bit mode is assumed.

In the I2C-bus mode a control byte is required when RS or R/W is changed; control byte: Co, RS, R/W, 0, 0, 0, 0, 0; command byte: DB7 to DB0.

2. Example: fosc = 150 kHz,

; 3 cycles = 20

µs, 165 cycles = 1.1 ms.

INSTRUCTION

R/W

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

DESCRIPTION

REQUIRED

CLOCK

CYCLES(2)

NOP

0000000000

No operation.

Clear display

000000001

Clears entire display and sets DDRAM

address 0 in Address Counter.

165

Return home

000000010

Sets DDRAM address 0 in Address Counter

Also returns shifted display to original position

DDRAM contents remain unchanged.

Entry mode set

0000001

I/D

Sets cursor move direction and speciﬁes shift

of display. These operations are performed

during data write and read.

Display control

000001

Sets entire display on/off (D), cursor on/off (C)

and blink of cursor position character (B).

Cursor/display shift

00001

S/C

R/L

Moves cursor and shifts display without

changing DDRAM contents.

Function set

0001

Sets interface data length (DL), number of

display lines (N, M) and voltage generator

control (G).

Set CGRAM

address

0001

ACG

Sets CGRAM address.

Set DDRAM

address

001

ADD

Sets DDRAM address.

Read busy ﬂag and

address

Reads Busy Flag (BF) indicating internal

operation is being performed and reads

Address Counter contents.

Read data

read data

Reads data from CGRAM or DDRAM.

Write data

write data

Writes data to CGRAM or DDRAM.

osc

---------

6.67

µs

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