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DSPIC30F 数据表(PDF) 146 Page - Microchip Technology |
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DSPIC30F 数据表(HTML) 146 Page - Microchip Technology |
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146 / 220 page ![]() dsPIC30F5011/5013 DS70116C-page 144 Preliminary 2004 Microchip Technology Inc. Table 20-5 shows the Reset conditions for the RCON register. Since the control bits within the RCON register are R/W, the information in the table implies that all the bits are negated prior to the action specified in the condition column. TABLE 20-5: INITIALIZATION CONDITION FOR RCON REGISTER: CASE 1 Condition Program Counter TRAPR IOPUWR EXTR SWR WDTO IDLE SLEEP POR BOR Power-on Reset 0x000000 00 0 0 0 0 0 1 1 Brown-out Reset 0x000000 00 0 0 0 0 0 0 1 MCLR Reset during normal operation 0x000000 00 1 0 0 0 0 0 0 Software Reset during normal operation 0x000000 00 0 1 0 0 0 0 0 MCLR Reset during Sleep 0x000000 00 1 0 0 0 1 0 0 MCLR Reset during Idle 0x000000 00 1 0 0 1 0 0 0 WDT Time-out Reset 0x000000 00 0 0 1 0 0 0 0 WDT Wake-up PC + 2 00 0 0 1 0 1 0 0 Interrupt Wake-up from Sleep PC + 2(1) 00 0 0 0 0 1 0 0 Clock Failure Trap 0x000004 00 0 0 0 0 0 0 0 Trap Reset 0x000000 10 0 0 0 0 0 0 0 Illegal Operation Trap 0x000000 01 0 0 0 0 0 0 0 Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’ Note 1: When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector. |
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