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AD8196ACPZ-R7 数据表(PDF) 10 Page - Analog Devices |
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AD8196ACPZ-R7 数据表(HTML) 10 Page - Analog Devices |
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10 / 24 page ![]() AD8196 Preliminary Technical Data PrA | Page 10 of 24 TA = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input swing = 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, pattern = PRBS 27 − 1, data rate = 2.25 Gbps, unless otherwise noted. Figure 14. Jitter vs. Input Cable Length (See Figure 4 for Test Setup) Figure 15. Jitter vs. Data Rate Figure 16. Jitter vs. Supply Voltage Figure 17. Jitter vs. Output Cable Length (See Figure 9 for Test Setup) Figure 18. Eye Height vs. Data Rate Figure 19. Eye Height vs. Supply Voltage |
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