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AD8196ACPZ-R7 数据表(PDF) 14 Page - Analog Devices |
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AD8196ACPZ-R7 数据表(HTML) 14 Page - Analog Devices |
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14 / 24 page ![]() AD8196 Preliminary Technical Data PrA | Page 14 of 24 SERIAL CONTROL INTERFACE RESET On initial power-up, or at any point in operation, the AD8196 register set can be restored to the default values by pulling the RESET pin to low according to the specification in Table 1. During normal operation, however, the RESET pin must be pulled up to 3.3 V. Pulling the RESET pin to low sets the HS_CH register to 0 (Input A) and incurs the associated switching delay before the input can be switched to Input B, regardless of the previous state of the AD8196. WRITE PROCEDURE To write data to the AD8196 register set, an I2C master (such as a microcontroller) needs to send the appropriate control signals to the AD8196 slave device. The signals are controlled by the I2C master unless otherwise specified. For a diagram of the procedure, see Figure 29. The steps for a write procedure are as follows: 1. Send a start condition (while holding the I2C_SCL line high, pull the I2C_SDA line low). 2. Send the AD8196 part address (seven bits). The upper six bits of the AD8196 part address are the static value [100100] and the LSB is set by Input Pin I2C_ADDR. This transfer should be MSB first. 3. Send the write indicator bit (0). 4. Wait for the AD8196 to acknowledge the request. 5. Send the register address (eight bits) to which data is to be written. This transfer should be MSB first. 6. Wait for the AD8196 to acknowledge the request. 7. Send the data (eight bits) to be written to the register whose address was set in Step 5. This transfer should be MSB first. 8. Wait for the AD8196 to acknowledge the request. 9. Do one of the following: a. Send a stop condition (while holding the I2C_SCL line high, pull the I2C_SDA line high) and release control of the bus to end the transaction (shown in Figure 29). b. Send a repeated start condition (while holding the I2C_SCL line high, pull the I2C_SDA line low) and continue with Step 2 in this procedure to perform another write. c. Send a repeated start condition (while holding the I2C_SCL line high, pull the I2C_SDA line low) and continue with Step 2 of the read procedure (in the Read Procedure section) to perform a read from another address. d. Send a repeated start condition (while holding the I2C_SCL line high, pull the I2C_SDA line low) and continue with Step 8 of the read procedure (in the Read Procedure section) to perform a read from the same address set in Step 5. R/W ACK ACK ADDR START FIXED ADDR PART REGISTER ADDR DATA STOP ACK 1 2 3 4 5 6 7 8 9 I2C_SCL GENERAL CASE I2C_SDA EXAMPLE I2C_SDA *THE SWITCHING/UPDATE DELAY BEGINS AT THE FALLING EDGE OF THE LAST DATA BIT; FOR EXAMPLE, THE FALLING EDGE JUST BEFORE STEP 8. * Figure 29. I2C Write Procedure |
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