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74LVC161 数据表(PDF) 3 Page - Nexperia B.V. All rights reserved

部件名 74LVC161
功能描述  Presettable synchronous 4-bit binary counter; asynchronous reset
PDF  19 Pages
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制造商  NEXPERIA [Nexperia B.V. All rights reserved]
网页  https://www.nexperia.com/
标志 NEXPERIA - Nexperia B.V. All rights reserved

74LVC161 数据表(HTML) 3 Page - Nexperia B.V. All rights reserved

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Nexperia
74LVC161
Presettable synchronous 4-bit binary counter; asynchronous reset
mna909
CP
PE
TC
MR
inhibit
count
CEP
CET
D0
D2
D1
D3
Q0
Q2
Q1
Q3
reset
preset
12
13
14
15
0
1
2
Typical timing sequence: reset outputs to zero; preset to binary twelve; count to thirteen, fourteen, fifteen, zero,
one and two; inhibit.
Fig. 5. Timing sequence
74LVC161
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 7 — 22 September 2021
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