ADP1822

Rev. B | Page 12 of 24

THEORY OF OPERATION

The ADP1822 is a versatile, economical, synchronous-rectified,

fixed frequency, voltage-mode, pulse-width modulated (PWM)

step-down controller capable of generating an output voltage as

low as 0.6 V. It is ideal for a wide range of high power

applications, such as DSP and processor core power in telecom,

medical imaging, and industrial applications. The ADP1822

controller runs from 3.0 V to 5.5 V and accepts a power input

voltage between 1.0 V and 20 V.

The ADP1822 includes circuitry to implement output voltage

margining and can track an external voltage, making it ideal for

high reliability applications with multiple dc-to-dc converters. It

operates at a fixed, internally set 300 kHz or 600 kHz switching

frequency that is controlled by the state of the FREQ input. The

high frequency reduces external component size and cost while

maintaining high efficiency. For noise sensitive applications

where the switching frequency needs to be more tightly con-

trolled, synchronize the ADP1822 to an external signal whose

frequency is between 300 kHz and 1.2 MHz.

The ADP1822 includes adjustable soft start with output reverse-

current protection, and a unique, adjustable, lossless current

limit. It operates over the −40°C to +85°C temperature range

and is available in a space-saving, 24-lead QSOP package.

CURRENT-LIMIT SCHEME

The ADP1822 employs a unique, programmable cycle-by-cycle

lossless current-sensing scheme that uses an inexpensive

resistor to set the current limit. A 50 μA current source is forced

out of CSL to a programming resistor connected to SW. The

resulting voltage across the current sense resistor sets the

current-limit threshold. When on-state voltage of the low-side

MOSFET synchronous rectifier exceeds the programmed

threshold, the low-side MOSFET remains on, preventing

another on cycle and reducing the inductor current. Once the

MOSFET voltage and thus the inductor current is below the

current-sense threshold, the synchronous rectifier is allowed to

turn off and another cycle begins.

When the ADP1822 senses an overcurrent condition, SS sinks

current from the soft start capacitor through an internal 2.5 kΩ

resistor, reducing the voltage at SS and thus reducing the

regulated output voltage. The ADP1822 remains in this mode

for as long as the over-current condition persists. When the

over-current condition is removed, operation resumes in soft

start mode. This ensures that when the overload condition is

removed, the output voltage smoothly transitions back to

regulation while providing protection for overload and short-

circuit conditions.

OUTPUT VOLTAGE MARGINING

The ADP1822 features output voltage margining. MAR enables

voltage margining, and MSEL controls whether the voltage is

margined up or down.

The voltage is margined by switching a resistor from FB to

GND (for the high margin) or from FB to the output voltage

(for the low margin). The switches from FB are internal to the

ADP1822 through the MUP and MDN terminals. Table 4 shows

the states of MAR and MSEL and the resulting voltage margin

setting. See the Setting the Voltage Margin section for more

information.

Table 4. Voltage Margining Control

MSEL

MAR

Voltage Margin

X

L

None (FB not changed)

H

H

High margin (FB connected to MUP)

L

H

Low margin (FB connected to MDN)

OUTPUT VOLTAGE TRACKING

The ADP1822 features an internal comparator that forces the

output voltage to track an external voltage at startup, which

prevents the output voltage from exceeding the tracking voltage.

The comparator turns off the high-side switch if the positive

tracking (TRKP) input voltage exceeds the negative tracking

(TRKN) input voltage. Connect TRKP to the output voltage and

drive TRKN with the voltage to be tracked. If the voltage at

TRKN is below the regulation voltage, the output voltage is

limited to the voltage at TRKN. If the voltage at TRKN is above

the regulation voltage, the output voltage regulates the desired

voltage set by the voltage divider. For more information, see the

Setting the Output Voltage Tracking section.

SOFT START

When powering up or resuming operation after shutdown,

overload, or short-circuit conditions, the ADP1822 employs an

adjustable soft start feature that reduces input current transients

and prevents output voltage overshoot at start-up and overload

conditions. The soft start period is set by the value of the soft

enabled by either driving SHDN high or by bringing VCC

charges, the regulation voltage at FB is limited to the lesser of

either the voltage at SS or the internal 0.6 V reference voltage.

As the voltage at SS rises, the output voltage rises proportionally

until the voltage at SS exceeds 0.6 V. At this time, the output

voltage is regulated to the desired voltage.