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ADP1822ARQZ-R7 数据表(PDF) 17 Page - Analog Devices

部件名 ADP1822ARQZ-R7
功能描述  PWM, Step-Down DC-to-DC Controller with Margining and Tracking
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1822ARQZ-R7 数据表(HTML) 17 Page - Analog Devices

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ADP1822
Rev. B | Page 17 of 24
or
In all three cases, it is sometimes beneficial, although not required,
to add an additional compensation capacitor, CC2, from COMP
to FB to reduce high frequency noise. This capacitor forms an
extra pole in the loop response. Choose this capacitor such that
the pole occurs at approximately 1/2 of the switching frequency, or
()(
)
COMP
C
COMP
SW
PC
R
C
C
f
F
2
2
//
π
2
1
2
=
=
(22)
Assuming CCOMP >> CC2, then solving for CC2,
()(
)
COMP
SW
C
R
f
C
π
2
2
2 =
(23)
Compensation Using the ESR Zero
VOUT
TO
PWM
COMP
FB
0.6V
RCOMP
CCOMP
CC2
RTOP
RBOT
INTERNAL ERROR AMPLIFIER
Figure 18. Compensation Using the ESR Zero
If the output capacitor ESR zero is sufficiently low (less than or
equal to 1/2 of the crossover frequency), use the ESR to stabilize
the regulator. In this case, use the circuit shown in Figure 16.
Choose the compensation resistor to set the desired crossover
frequency, typically 1/10 of the switching frequency or
()
(
)()(
()
)
2
LC
IN
CO
ESRZ
RAMP
TOP
COMP
f
V
f
f
V
R
R
=
(24)
where:
RCOMP is the compensation resistor.
VRAMP is the internal ramp peak voltage, 1.25 V.
fESRZ and fCO are the ESR zero and crossover frequencies.
VIN is the dc input voltage.
fLC is the characteristic frequency of the output LC filter, or
LC
f
LC
π
2
1
=
(25)
using known constants
()(
)( )( )( )
IN
SW
ESRZ
TOP
COMP
V
C
L
f
f
R
R
9
.
4
(26)
Choose the compensation capacitor to set the compensation
zero, fZC, to the lesser of 1/4 of the crossover frequency or 1/2 of
the LC resonant frequency, or
()(
)
COMP
COMP
SW
CO
ZC
R
C
f
f
f
π
2
1
40
4
=
=
=
(27)
()(
)
COMP
COMP
LC
ZC
R
C
f
f
π
2
1
2
=
=
(28)
Solving for CCOMP,
()(
)
COMP
CO
COMP
R
f
C
π
2
4
=
(29)
In terms of the switching frequency and combining the constants,
()(
)
COMP
SW
COMP
R
f
C
37
.
6
(30)
or
()(
)
COMP
LC
COMP
R
f
C
π
2
2
=
(31)
or whichever is greater.
Compensation Using Feed-Forward
VOUT
TO
PWM
COMP
FB
0.6V
RCOMP
CCOMP
RTOP
RBOT
RFF
CFF
INTERNAL ERROR AMPLIFIER
CC2
Figure 19. Compensation Using Feed-Forward
If the ESR zero is at too high a frequency to be useful in
stabilizing the regulator, add a series RC network, as shown in
Figure 17, in parallel with the top side voltage divider resistor,
RTOP. This adds an additional zero and pole pair that is used to
increase the phase at crossover, thus improving stability.
Choose the feed-forward zero frequency for 1/7 of the crossover
frequency, and the feed-forward pole at 7× the crossover
frequency. This sets the ratio of pole-to-zero frequency of
approximately 50:1 for optimum stability.
Choose the compensation resistor, RCOMP, to set the crossover
frequency by
(
)(
)(
)( )
()2
LC
IN
CO
ZFF
RAMP
TOP
COMP
f
V
f
f
V
R
R
=
(32)
where fZFF is the feed-forward zero frequency and is 1/7 of the
crossover frequency. Simplify the following equation:
(
)() ()()
IN
SW
TOP
COMP
V
C
L
f
R
R
2
0705
.
0
(33)



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