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ADT7408CCPZ-R2 数据表(PDF) 6 Page - Analog Devices |
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ADT7408CCPZ-R2 数据表(HTML) 6 Page - Analog Devices |
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6 / 24 page ![]() ADT7408 Rev. 0 | Page 6 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADT7408 TOP VIEW (Not to scale) 8 VDD 7 EVENT# 6 SCL 5 SDA A0 1 A1 2 A2 3 VSS 4 Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 A0 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD. 2 A1 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD. 3 A2 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to VSS or VDD. 4 VSS Negative Supply or Ground. 5 SDA SMBus/I2C Serial Data Input/Output. Serial data to be loaded into the part’s registers and read from these registers is provided on this pin. Open-drain configuration; it needs a pull-up resistor. 6 SCL Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock data into and clock data out from any register of the ADT7408. Open-drain configuration needs a pull-up resistor. 7 EVENT# Active Low. Open-drain event output pin. Driven low on comparator level or alert interrupt. 8 VDD Positive Supply Power. The supply should be decoupled to ground. |
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