ADT7408

Rev. 0 | Page 18 of 24

The data registers in the ADT7408 are selected by the pointer

register. At power-up the pointer register is set to 0x00, the

location for the capability register. The pointer register latches

the last location to which it was set. Each data register falls into

one of the following three types of user accessibility:

•

Read only

•

Write only

•

Write/Read same address

A write to the ADT7408 always includes the address byte and

the pointer byte. A write to any register other than the pointer

register requires two data bytes.

Reading data from the ADT7408 occurs in one of the following

two ways:

•

If the location latched in the pointer register is correct,

then the read simply consists of an address byte,

followed by retrieving the two data bytes.

•

If the pointer register needs to be set, then an address

byte, pointer byte, repeat start, and another address

byte accomplish a read.

The data byte has the most significant bit first. At the end of a

read, the ADT7408 accepts either acknowledge (ACK) or no

acknowledge (NO ACK) from the master. No acknowledge is

typically used as a signal for the slave that the master has read

its last byte. It typically takes the ADT7408 100 ms to measure

the temperature.

Writing Data to a Register

With the exception of the pointer register, all other registers are

16 bits wide, so two bytes of data are written to these registers.

Writing two bytes of data to these registers consists of the serial

bus address, the data register address written to the pointer

register, followed by the two data bytes written to the selected

data register (see Figure 14). If more than the required number

of data bytes is written to a register, then the register ignores

these extra data bytes. To write to a different register, another

start or repeated start is required.

D15

D13

D14

D12

D10

D11

D9

D8

D7

D5

D6

D4

D2

D3

D1

D0

99

1

1

FRAME 3

MOST SIGNIFICANT DATA BYTE

FRAME 4

LEAST SIGNIFICAN DATA BYTE

SCL

(CONTINUED)

SDA

(CONTINUED)

SCL

SDA

STOP

BY

MASTER

A6

A4

A5

A3

A1

A2

A0

R/W

D7

D5

D6

D4

D2

D3

D1

D0

99

1

1

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

POINTER BYTE

ACK

BY

TS

ACK

BY

TS

STOP

BY

MASTER

START BY

MASTER

ACK

BY

TS

ACK

BY

TS

Figure 14. Writing to the Address Pointer Register, Followed by Two Bytes of Data