AD5522JSVDZ datasheet(21/45 Pages) AD

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Preliminary Technical Data

AD5522

Rev. PrL | Page 21 of 45

Offset and Gain registers for the FIN DAC

The FIN (force amplifier input) DAC level contains

independent offset and gain control registers that allow the user

to digitally trim offset and gain. There are six sets of x1, m and c

registers, one set (x1, m and c) for the force voltage range, and

one set for each of the force current ranges (4 internal current

ranges and 1 external current range). Six x2 registers store

calculated DAC values ready to load to the DAC register on a

mode change.

Serial I/F

FIN

X1 REG

CREG

MREG

16-Bit

FIN DAC

OFFSET DAC

X2 REG

VREF

Figure 12. FIN DAC Registers

Offset and Gain registers for the COMPARATOR DACs

The Comparator DAC levels contain independent offset and

gain control registers that allow the user to digitally trim offset

and gain. There are six sets of (x1, m and c) registers, one set for

the voltage mode, and one set for each of the four internal

current ranges and one set for the external current range. In this

way, x1 may also be preprogrammed, so switching different

modes, allows for efficient switching into the required compare

mode. Six x2 registers store cached calculated DAC values ready

to load to the DAC register on a mode change.

VREF

CPH

X1 REG

CREG

MREG

X1 REG

CREG

MREG

Serial I/F

CPL

16-Bit

CPH DAC

16-Bit

CPL DAC

X2 REG

Figure 13. Comparator Registers

Offset and Gain registers for the Clamp DACs

The clamp DAC levels contain independent offset and gain

control registers that allow the user to digitally trim offset and

gain. There are just two sets of registers, one for the voltage

mode and another register set (x1, m and c) for all five current

ranges. Two x2 registers store cached calculated DAC values

ready to load to the DAC register on a PMU mode change.

VREF

X1 REG

CREG

MREG

X1 REG

CREG

MREG

Serial I/F

CLH

CLL

16-Bit

CLH DAC

16-Bit

CLL DAC

X2 REG

Figure 14. Clamp Registers

VREF

One buffered analog input supplies all 20 DACs with the

necessary reference voltage to generate the required DC levels.

REFERENCE SELECTION

The voltage applied to the VREF pin determines the output

voltage range and span applied to the force amplifier, clamp and

comparator inputs. This device can be used with a reference

input ranging from 2V to 5V, however, for most applications, a

reference input of 5V or 2.5V will be sufficient to meet all

voltage range requirements. The DAC amplifier gain is 4.5,

which gives a DAC output span of 22.5V. The DACs have offset

and gain registers which can be used to calibrate out system

errors.

In addition, the gain register can be used to reduce the DAC

output range to the desired force voltage range. The Force DAC

will retain 16 bit resolution even with a gain register setting of

quarter scale (0x4000). Therefore, from a single 5V reference, it

is possible to get a voltage span as high as 22.5V or as low as

5.625V all from one 5V reference.

When using the offset and gain registers, the chosen output

range should take into account the system offset and gain errors

that need to be trimmed out. Therefore, the chosen output

range should be larger than the actual, required range.

When using low supply voltages, ensure that there is sufficient

headroom and footroom for the required force voltage range.

Also, note that with a supply differential of less than 18V and a

full scale current range requirement, it is necessary to reduce

the current measure in amp gain to 5 so the feedback path can

swing through the full range.

Also, the forced current range will only be the quoted full scale

range with an applied reference of 5V or 2.5V (with ISENSE

AMP gain = 5).

For other voltage/current ranges, the required reference level

can be calculated as follows:

Identify the nominal range required

Identify the maximum offset span and the maximum

gain required on the full output signal range.

Calculate the new maximum output range including

the expected maximum offset and gain errors.

Choose the new required VOUTmax and VOUTmin,

keeping the VOUT limits centered on the nominal

values. Note that AVDD and AVSS must provide

sufficient headroom.

Calculate the value of VREF as follows:

VREF = (VOUTMAX – VOUTMIN)/4.5

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