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AD5665-RBRUZ-2 数据表(PDF) 24 Page - Analog Devices |
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AD5665-RBRUZ-2 数据表(HTML) 24 Page - Analog Devices |
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24 / 32 page ![]() AD5625R/AD5645R/AD5665R, AD5625/AD5665 Preliminary Technical Data Rev. PrA. | Page 24 of 32 MULTIPLE BYTE WRITE Once an AD56x5 has been addressed, one or more three-byte blocks of command and data can be sent to the device, until a stop condition is received. The device must then be re- addressed. For this type of operation, the “S” bit in the command byte is set to zero. For some types of application such as waveform generation, it may be required to update a DAC or DACs as fast as possible without changing the command byte. In this case the “S” bit in the initial command byte is set to 1. This sets the command parameters for all subsequent data. Thereafter, multiple two- byte blocks of data high byte and data low byte can be sent, without sending a further command byte, until a stop condition is received. The “S” bit is only active in the first command byte following the device slave address. Therefore, even if the “S” bit is 0 and three-byte blocks of command and data are being sent, it is not possible to alter the multi-byte mode by changing the “S” bit to 1 “on-the-fly” during any subsequent command byte. STOP LEAST SIGNIFICANT DATA BYTE MOST SIGNIFICANT DATA BYTE COMMAND BYTE BLOCK 1 S=0 SLAVE ADDRESS LEAST SIGNIFICANT DATA BYTE MOST SIGNIFICANT DATA BYTE COMMAND BYTE BLOCK 2 S=0 LEAST SIGNIFICANT DATA BYTE MOST SIGNIFICANT DATA BYTE COMMAND BYTE BLOCK n S=0 Figure 57. Multiple Block Write With Command Byte in Each Block (S=0) STOP LEAST SIGNIFICANT DATA BYTE MOST SIGNIFICANT DATA BYTE COMMAND BYTE BLOCK 1 S=1 SLAVE ADDRESS LEAST SIGNIFICANT DATA BYTE MOST SIGNIFICANT DATA BYTE BLOCK 2 S=1 LEAST SIGNIFICANT DATA BYTE MOST SIGNIFICANT DATA BYTE BLOCK n S=1 Figure 58. Multiple Block Write With Initial Command Byte Only (S=1) BROADCAST MODE In addition to the unique slave address for each device, which is set by the address pin(s), The AD56x5 has a broadcast address to which any AD56x5 will respond, irrespective of the state of the address pin(s). This address is 0001000(Write). Where several AD56x5 devices are connected to a bus, they can all be sent the same data using the broadcast address. The broadcast address only works for write operations. It is not possible to read back data from several devices at the same time, due to bus contention. INPUT SHIFT REGISTER The input shift register is 24 bits wide to store the 3 data bytes written to the device of the serial interface. Data written to the device is split into four sections: - One bit to select multiple byte operation. - a three bit command that tells the device what operation to perform. - a three-bit address that tells the device to which DAC or DACs the command applies. - 16 bits of data, which, depending on the command may be written to a DAC or used to define the parameters of a command operation. Bit 23 of the input shift register is reserved, and should always be set to 0 when writing to the device. The command and address are contained in the command byte, the 8 MSBs of the input register. The middle 8 bits are the high byte of the DAC data, while the 8 least significant bits are the low byte of the DAC data or command data. DAC data is left justified, so the two LSBs are unused for the 14 bit AD5645R, and the four LSBs are unused for the 12-bit AD5625R (but they are still used for command data in these devices. The AD56x5 has seven different commands that can be written to it. C2 C1 C0 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D2 D3 D1 D0 S R COMMAND DAC ADDRESS DAC DATA DAC OR COMMAND DATA COMMAND BYTE DATA HIGH BYTE DATA LOW BYTE DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Figure 59. AD5665R/AD5665 Input Shift Register (16-Bit DAC) |
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