AD5665-RBRUZ-2 datasheet(25/32 Pages) AD

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Preliminary Technical Data

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Rev. PrA. | Page 25 of 32

D13

D12

D11

D10

COMMAND

DAC ADDRESS

DAC DATA

DAC OR COMMAND DATA

COMMAND BYTE

DATA HIGH BYTE

DATA LOW BYTE

DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Figure 60. AD5645R Input Shift Register (14-Bit DAC)

D11

D10

COMMAND

DAC ADDRESS

DAC DATA

DAC OR COMMAND DATA

COMMAND BYTE

DATA HIGH BYTE

DATA LOW BYTE

DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

Figure 61. AD5625R/AD5625 Input Shift Register (12-Bit DAC)

WRITE COMMANDS AND LDAC

Table 10.

Command Definition

Command

Write to input register n

Update DAC register n

Write to input register n, update all (software

LDAC)

Write to and update DAC channel n

Power up/power down

Reset

LDAC register setup

Internal reference setup (on/off )

Table 10 is the truth table for the command bits. The DAC or

DACs on which a command is performed is/are defined by n,

which is the DAC address shown in table 11. Some commands

required additional data which is defined in the low data byte.

Table 11. DAC Address Command

ADDRESS (n)

DAC A

DAC B

DAC C

DAC D

All DACs

The AD5625R/AD5645R/AD5665R, AD5625/AD5665 DACs

have double-buffered interfaces consisting of two banks of

registers: input registers and DAC registers. The input registers

are connected directly to the input shift register and the digital

code is transferred to the relevant input register on completion

of a valid write sequence. The DAC registers contain the digital

code used by the resistor strings.

The double-buffered interface is useful if the user requires

simultaneous updating of all DAC outputs. For example, the

user could write to three of the input registers individually and

then write to the remaining input register and, updating all

DAC registers, the outputs will update simultaneously.

The AD56x5 has a powerful set of commands for writing to and

updating the DACs. The 14-pin version also has a hardware

load DAC (LDAC) pin. It is important to understand how these

commands and the LDAC pin operate and interact with each

other, in order to ensure that the desired result is obtained.

The first four commands are used for writing to and updating

the DACs.

Command 000 writes to input register n, without updating the

DAC registers, where n is the input register defined by the A2 ---

A0 bits in the command byte. Depending on the value of A2 ---

A0, this can be any one of the input registers or all four input

registers, as defined b y the DAC address.

Command 001 does not write to the input registers, but

(depending on the value of A2 --- A0) updates a DAC register or

all four DAC registers.

Command 010 writes to input register n, and updates all DAC

registers.

Command 011 writes to input register n and updates DAC

010 and 011 are equivalent if A2 --- A0 = 111.

LDAC SETUP

In addition to the write commands, the LDAC setup command

(110) can also determine which DACs are updated at the end of

a write operation (this command does not update the DACs

when it is implemented). It also affects the operation of the

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