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AD9927BBCZ 数据表(PDF) 43 Page - Analog Devices |
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AD9927BBCZ 数据表(HTML) 43 Page - Analog Devices |
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43 / 100 page ![]() AD9927 Rev. 0 | Page 43 of 100 Multiplier Mode To generate very wide vertical timing pulses, a vertical region can be configured into a multiplier region. This mode uses the V-pattern registers in a slightly different manner. Multiplier mode can be used to support unusual CCD timing requirements, such as vertical pulses that are wider than the 13-bit V-pattern toggle position counter. In general, the 13-bit toggle position counter can be used with the sweep mode feature to support very wide pulses; however, multiplier mode can be used to generate even wider pulses. The start polarity and toggle positions are still used in the same manner as the standard V-pattern group programming, but VLEN is used differently. Instead of using the pixel counter (HD counter) to specify the toggle position locations (VTOG1, VTOG 2, VTOG 3, and VTOG 4) of the V-pattern group, the VLEN is multiplied with the VTOG position to allow very long pulses to be generated. To calculate the exact toggle position, which is counted in pixels after the start position, use the following equation: VLEN VTOG Position Toggle Mode Multiplier × = Because the VTOG register is multiplied by VLEN, the resolution of the toggle position placement is reduced. If VLEN = 4, the toggle position precision is reduced to 4-pixel increments instead of to single-pixel increments. Table 18 summarizes how the V-pattern group registers are used in multiplier mode operation. In multiplier mode, the VREP registers must always be programmed to the same value as the highest toggle position. Figure 51 illustrates this operation. The first toggle position is 2, and the second toggle position is 9. In nonmultiplier mode, this causes the V-sequence to toggle at Pixel 2 and then at Pixel 9 within a single HD line. However, in multiplier mode toggle positions are multiplied by the value of VLEN (in this case, 4); therefore, the first toggle occurs at Pixel 8, and the second toggle occurs at Pixel 36. Sweep mode has also been enabled to allow the toggle positions to cross the HD line boundaries. Table 18. Multiplier Mode Register Parameters Register Length Range Description MULTI 1b High/low High enables multiplier mode. VPOL 1b High/low Starting polarity of XV1 to XV10 signals in each V-pattern group. VTOG 13b 0 to 8191 pixel location Toggle positions for XV1 to XV10 signals in each V-pattern group. VLEN 13b 0 to 8191 pixels Used as multiplier factor for toggle position counter. VREP 13b 0 to 8191 pixel location VREP_EVEN/VREP_ODD must be set to the same value as the highest VTOG value. XV1 TO XV24 HD VLEN 123 412 3412 3412 3412 341 2341 2341 234 1234 1234 START POSITION OF VPAT GROUP IS STILL PROGRAMMED IN THE V-SEQUENCE REGISTERS PIXEL NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 3 55 4 1 2 4 2 MULTIPLIER MODE V-PATTERN GROUP PROPERTIES: 1START POLARITY (STARTPOL = 0). 2FIRST, SECOND, AND THIRD TOGGLE POSITIONS (VTOG1 = 2, VTOG2 = 9). 3LENGTH OF VPAT COUNTER (VLEN = 4); THIS IS THE MINIMUM RESOLUTION FOR TOGGLE POSITION CHANGES. 4TOGGLE POSITIONS OCCUR AT LOCATION EQUAL TO (VTOG × VLEN). 5IF SWEEP REGION IS ENABLED, THE V-PULSES MAY ALSO CROSS THE HD BOUNDRIES, AS SHOWN ABOVE. Figure 51. Example of Multiplier Region for Wide Vertical Pulse Timing |
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