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AS8579

Functional Description

Datasheet

• PUBLIC

DS000707

• v4-01 • 2022-Jun-08

│ 17

bit is set in the SPI Status register. In case of this error, the chip cannot guarantee the correct

synchronization between SPI clock and MCLK.

SM11 CBF

The safety mechanism Current Buffer Fail is monitoring the output voltage of the current-to-voltage

buffer. The sensor provides an error flag CBF=1 in Status Register when the output voltage is lower

than voltage threshold CBF_L or higher than voltage threshold CBF_H.

SM12 PPSF

The Pin-to-Pin Short diagnostic is realized with a pin-to-pin DC resistance measurement. For the pair

of pins being tested, the main MUX is set to MODE=0 (open). Two diagnostic MUX can route any of

the 11 tested pins (SEN lines & VAR_SEN to a comparator) programmed by PLUS/MINUS register

(0x2C/0x3C), referenced by a resistive divider. In case the resistance is too low, the PPSF Flag is

going high.

6.1.3

Blanking Error Flags

Each Safety Mechanism has its own Up/Down Counter (individually blanked). See 7.2.2 Status

0x2B command is used to read the current value of the BLANK register. The counters are clocked

from a signal synchronous with the transmitter sine wave. Effectively each Diagnostic is checked once

per sine cycle. The diagnostic bits in the Status Register which need blanking, do not clear when Error

is disappearing. They are latched until the Status Register is read through SPI.

Figure 12:

Example Diagnostic Maturity Using Blanking

Description in chapter “Diagnostic Blanking Register (Address 0x2B/0x3B)

Fault detected (analog)

Clock - ZC

0000

1111

1110

1101

1100

1011

1010

1001

1000

0111

0110

0101

0100

0011

0010

0001

Fault Status Bit

Fault matured

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