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LXT971ABC 数据表(PDF) 30 Page - Intel Corporation |
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LXT971ABC 数据表(HTML) 30 Page - Intel Corporation |
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30 / 90 page ![]() LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver 30 Datasheet Document #: 249414 Revision #: 002 Rev. Date: August 7, 2002 3.4.5 Hardware Configuration Settings The LXT971A provides a hardware option to set the initial device configuration. The hardware option uses the three LED driver pins. This provides three control bits, as listed in Table 9. The LED drivers can operate as either open-drain or open-source circuits as shown in Figure 8. Figure 8. Hardware Configuration Settings Table 9. Hardware Configuration Settings Desired Mode LED/CFGn Pin Settings1 Resulting Register Bit Values Control Register AN Advertisement Registers Auto- Neg Speed (Mbps) Duplex 1 2 3 Auto- Neg 0.12 Speed 0.13 FD 0.8 100FD 4.8 100TX 4.7 10FD 4.6 10T 4.5 Disabled 10 Half Low Low Low 0 0 0 N/A Auto-Negotiation Adver- tisement Full Low Low High 1 100 Half Low High Low 1 0 Full Low High High 1 Enabled 100 Only Half High Low Low 11 00 1 0 0 Full High Low High 1 1 1 0 0 10/100 Half Only High High Low 0 0 1 0 1 Full or Half High High High 1 1 1 1 1 1. Refer to Table 7 on page 19 for LED/CFG pin assignments. Configuration Bit = 1 Configuration Bit = 0 LED/CFG Pin LED/CFG Pin 3.3 V 1. The LED/CFG pins automatically adjust their polarity upon power-up or reset. 2. Unused LEDs may be implemented with pull-up/ pull-down resistors of 10 K. |
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