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LXT971ABC 数据表(PDF) 63 Page - Intel Corporation

部件名 LXT971ABC
功能描述  3.3V Dual-Speed Fast Ethernet PHY Transceiver
PDF  90 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

LXT971ABC 数据表(HTML) 63 Page - Intel Corporation

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Datasheet
63
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Figure 30. 100BASE-FX Receive Timing
Table 31. 100BASE-FX Receive Timing Parameters
Parameter
Sym
Min
Typ1
Max
Units2
Test Conditions
RXD<3:0>, RX_DV, RX_ER setup
to RX_CLK High
t1
10
–
–
ns
–
RXD<3:0>, RX_DV, RX_ER hold
from RX_CLK High
t2
10
–
–
ns
–
CRS asserted to RXD<3:0>, RX_DV
t3
3
–
5
BT
–
Receive start of “J” to CRS asserted
t4
12
–
16
BT
–
Receive start of “T” to CRS de-asserted
t5
16
–
22
BT
–
Receive start of “J” to COL asserted
t6
10
–
15
BT
–
Receive start of “T” to COL de-asserted
t7
14
–
18
BT
–
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
testing.
2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate.
100BASE-T bit time = 10-8 s or 10 ns.
t4
t5
t3
t6
t7
0ns
250ns
CRS
RX_DV
RXD<3:0>
RX_CLK
COL
t1
t2
TPFI



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