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LXT971ABC 数据表(PDF) 39 Page - Intel Corporation

部件名 LXT971ABC
功能描述  3.3V Dual-Speed Fast Ethernet PHY Transceiver
PDF  90 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

LXT971ABC 数据表(HTML) 39 Page - Intel Corporation

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Datasheet
39
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
In the receive direction, the PCS layer performs the opposite function, substituting two preamble
nibbles for the SSD.
3.7.3.1.2 Dribble Bits
The LXT971A handles dribbles bits in all modes. If one to four dribble bits are received, the nibble
is passed across the MII, and padded with ones if necessary. If five to seven dribble bits are
received, the second nibble is not sent to the MII bus.
Figure 20. Protocol Sublayers
Encoder/Decoder
Serializer/De-serializer
Link/Carrier Detect
PCS
Sublayer
PMA
Sublayer
MII Interface
PECL Interface
Fiber Transceiver
LXT971A
100BASE-TX
100BASE-FX
Scrambler/
De-scrambler
PMD
Sublayer



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