MP8861 – 2.85V - 18V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER

MP8861 Rev. 1.1

www.MonolithicPower.com

16

5/28/2020

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almost to zero. When the inductor current

reaches zero, the LS-FET driver goes into tri-

state (Hi-Z) (see Figure 5). The output

capacitors discharge slowly to GND through R1

and R2. This operation improves device

efficiency greatly when the output current is low.

Figure 5: Light-Load Operation

Light-load operation is also called skip mode

because the HS-FET does not turn on as

frequently as it does during heavy-load

condition. The frequency at which the HS-FET

turns on is a function of the output current. As

the output current increases, the current

modulator regulation time period becomes

shorter, the HS-FET turns on more frequently,

and the switching frequency increases. The

output current reaches critical levels when the

current modulator time is zero and can be

determined with Equation (1):

IN

OUT

OUT

OUT

SW

IN

(V

V

) V

I

2L F

V









(1)

The MP8861 reverts to PWM mode once the

output current exceeds the critical level.

Afterward, the switching frequency remains

fairly constant over the output current range.

The MP8861 can operate in PFM mode under

light load to improve efficiency (low-power

mode). The MP8861 can also operate in forced

PWM mode at any load condition. The mode is

selectable through the I2C control. To enable

low-power mode, set the Mode bit to 0. To

disable low-power mode, set the Mode bit to 1,

and the converter works in forced PWM mode.

The Mode bit is set to 0 (PFM) by default.

Operating without an External Ramp

The traditional constant-on-time (COT) control

scheme is intrinsically unstable if the output

capacitor’s ESR is not large enough to be an

effective

current-sense

resistor.

Ceramic

capacitors cannot be used as output capacitors,

typically. The MP8861 has built-in, internal

ramp compensation to ensure that the system

is stable, even without the help of the output

capacitor’s ESR. The pure ceramic capacitor

solution can reduce the output ripple, total BOM

cost, and board area significantly.

VCC Regulator

A 3.5V internal regulator powers most of the

internal

circuitries.

A

470nF

decoupling

capacitor is needed to stabilize the regulator

and reduce ripple. This regulator takes the VIN

input and operates in the full VIN range. After

EN is pulled high and VIN is greater than 3.5V,

the output of the regulator is in full regulation.

When VIN is lower than 3.5V, the output

voltage decreases and follows the input voltage.

A 0.47μF ceramic capacitor is required for

decoupling.

Error Amplifier (EA)

The error amplifier (EA) compares the FB

voltage against the internal 0.6V reference

(REF) and outputs a PWM signal. The

reference voltage can be programmed from

0.6V to 1.108V via the I2C. The optimized

internal ramp compensation minimizes the

external component count and simplifies the

control loop design.

Enable (EN)

EN is a digital control pin that turns the

regulator, including the I2C block, on and off.

Drive EN high to turn on the regulator. Drive EN

low to turn off the regulator. An internal 1.5MΩ

resistor is connected from EN to ground. EN

can operate with an 18V input voltage, which

allows EN to be directly connected to VIN for

automatic start-up. When the external EN is

high, set the EN bit to 0 in register 01 to stop

the HS-FET and LS-FET from switching. The

MP8861 resumes switching by setting the EN

bit to 1.

Under-Voltage Lockout (UVLO)

Under-voltage lockout (UVLO) protects the chip

from operating at an insufficient supply voltage.

The MP8861 UVLO comparator monitors the

input voltage, VIN, and output voltage of the

VCC regulator. The MP8861 is active when the

voltages exceed the UVLO rising threshold.