Symbol

Parameter

Test condition

Min Typ Max Unit

Logic inputs

Vil

LIN, HIN, SD/OD

Low level logic threshold

TJ = 25°C

1.1 1.31 1.45

V

Full Temperature range (5) 0.8

Vih

High level logic threshold

TJ = 25°C

2

2.17 2.5

V

Full Temperature range(5)

2.7

Vihys

Logic input threshold hysteresis

0.7 0.96 1.2

V

IINh

LIN, HIN

Logic ‘1’ input bias current

LIN, HIN = 5 V

23

33

55

μA

IINl

Logic ‘0’ input bias current

LIN, HIN = GND

1

μA

RPD_IN

Input pull-down resistor

LIN, HIN = 5 V

90

150 220

kΩ

ISDh

SD/OD

Logic “1” input bias current

SD/OD = 5 V

11

15

20

μA

ISDl

SD/OD

Logic “0” input bias current

SD/OD = 0 V

1

μA

RPD_SD

SD/OD

Pull-down resistor

SD/OD = 5 V

OpenDrain OFF

250 330 450

kΩ

VTSD

SD/OD

Thermal shutdown unlatch threshold

TJ = 25°C (6)

0.5 0.75

1

V

RON_OD

SD/OD

Open drain ON resistance

TJ = 25°C;

IOD = 400 mV(6)

8

10

18

Ω

IOL_OD

SD/OD

Open Drain low level sink current

TJ = 25°C;

VOD = 400 mV(6)

22

40

50

mA

Td_GL

LIN,GL

Prop. delay from LIN to GL

(6)

-

46

-

Td_GH

HIN,GH

Prop. delay from HIN to GH

(6)

-

46

-

Overtemperature protection

TTSD

Shutdown temperature

(5)

175

°C

THYS

Temperature hysteresis

(5)

20

°C

1. VCC UVLO is referred to VCC - GND

2. Turn on and turn off total resistances include the values of the gate resistors and the driver Rdson

3. VBO = VBOOT - VOUT

4. RBD(on) is tested in the following way:

RBD(on) = [(VCC - VBOOTa) - (VCC - VBOOTb)] / [Ia - Ib]

Where: Ia is BOOT pin current when VBOOT = VBOOTa; Ib is BOOT pin current when VBOOT = VBOOTb

5. Range estimated by characterization, not tested in production.

6. Tested at wafer level.

MASTERGAN2

Driver

DS13597 - Rev 2.0

page 7/29