Signal description

M34C02-W, M34C02-L, M34C02-R

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Signal description

2.1

Serial Clock (SCL)

This input signal is used to strobe all data in and out of the device. In applications where this

signal is used by slave devices to synchronize the bus to a slower clock, the bus master

must have an open drain output, and a pull-up resistor can be connected from Serial Clock

most applications, though, this method of synchronization is not employed, and so the pull-

up resistor is not necessary, provided that the bus master has a push-pull (rather than open

drain) output.

2.2

Serial Data (SDA)

This bi-directional signal is used to transfer data in or out of the device. It is an open drain

output that may be wire-OR’ed with other open drain or open collector signals on the bus. A

the value of the pull-up resistor can be calculated).

2.3

Chip Enable (E0, E1, E2)

These input signals are used to set the value that is to be looked for on the three least

significant bits (b3, b2, b1) of the 7-bit Device Select Code. These inputs must be tied to

Figure 3.

Chip Enable input connection

2.4

Write Control (WC)

This input signal is provided for protecting the contents of the whole memory from

inadvertent write operations. Write Control (WC) is used to enable (when driven Low) or

disable (when driven High) write instructions to the entire memory area or to the Protection

Register.

When Write Control (WC) is tied Low or left unconnected, the write protection of the first half

of the memory is determined by the status of the Protection Register.

Ai12819

VCC

M34C02-W

M34C02-L

M34C02-R

VSS

Ei

VCC

M34C02-W

M34C02-L

M34C02-R

VSS

Ei