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M34C02-R 数据表(PDF) 10 Page - STMicroelectronics |
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M34C02-R 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 31 page  Signal description M34C02-W, M34C02-L, M34C02-R 10/31 Figure 5. I2C bus protocol Table 2. Device Select Code Device Type Identifier(1) 1. The most significant bit, b7, is sent first. Chip Enable Address(2) 2. E0, E1 and E2 are compared against the respective external pins on the memory device. RW b7 b6 b5 b4 b3 b2 b1 b0 Memory Area Select Code (two arrays) 10 10 E2 E1 E0 RW Protection Register Select Code 01 10 E2 E1 E0 RW SCL SDA SCL SDA SDA START Condition SDA Input SDA Change AI00792B STOP Condition 1 23 7 89 MSB ACK START Condition SCL 1 23 7 89 MSB ACK STOP Condition |
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