CC2550-RTR1 datasheet(24/55 Pages) TI

24 / 55 page

CC2550

PRELIMINARY Data Sheet (Rev.1.2)

SWRS039A

Page 24 of 54

sequences must be followed: Automatic

power-on reset (POR) or manual reset.

16.1.1 Automatic POR

A power-on reset circuit is included in the

CC2550. The minimum requirements stated in

Section 4.7 must be followed for the power-on

reset to function properly. The internal power-

up sequence is completed when CHIP_RDYn

goes low. CHIP_RDYn is observed on the SO

pin after CSn is pulled low. See Section 10.1

for more details on CHIP_RDYn.

When the

CC2550 reset is completed the chip

will be in the IDLE state and the crystal

oscillator running. If the chip has had sufficient

time for the crystal oscillator and voltage

regulator to stabilize after the power-on-reset,

the SO pin will go low immediately after taking

CSn

low. If CSn is taken low before reset is

completed the SO pin will first go high,

indicating that the crystal oscillator and voltage

regulator is not stabilized, before going low as

shown in Figure 14.

CSn

XOSC and voltage

regulator stabilized

Figure 14: Power-on reset

16.1.2 Manual Reset

The other global reset possibility on

CC2550 is

the SRES command strobe. By issuing this

strobe, all internal registers and states are set

to the default, IDLE state. The manual power-

up sequence is as follows (see Figure 15):

•

Set SCLK=1 and SI=0, to avoid potential

problems with pin control mode (see

Section 11.2 on page 17).

•

Strobe CSn low / high.

•

Hold CSn high for at least 40 µs relative to

pulling CSn low

•

Pull CSn low and wait for SO to go low

(CHIP_RDYn).

•

Issue the SRES strobe on the SI line.

•

When SO goes low again, reset is

complete and the chip is in the IDLE state.

CSn

XOSC and voltage

regulator stabilized

XOSC and voltage regulator switched on

SRES

40 us

Figure 15: Power-on reset with SRES

Note that the above reset procedure is only

required just after the power supply is first

turned on. If the user wants to reset the

CC2550 after this, it is only necessary to issue

an SRES command strobe.

16.2

Crystal Control

The crystal oscillator is automatically turned on

when CSn goes low. It will be turned off if the

SXOFF

or SPWD command strobes are issued;

the state machine then goes to XOFF or

SLEEP respectively. This can be done from

any state. The XOSC will be turned off when

CSn

is released (goes high). The XOSC will be

automatically turned on again when CSn goes

low. The state machine will then go to the

IDLE state. The SO pin on the SPI interface

must be zero before the SPI interface is ready

to be used; as described in Section 10.1 on

page 15.

Crystal oscillator start-up time depends on

crystal ESR and load capacitances. The

electrical specification for the crystal oscillator

can be found in Section 4.3 on page 6.

16.3

Voltage Regulator Control

The voltage regulator to the digital core is

controlled by the radio controller. When the

chip enters the SLEEP state, which is the state

with the lowest current consumption, the

voltage regulator is disabled. This occurs after

CSn

is released when a SPWD command

strobe has been sent on the SPI interface. The

chip is now in the SLEEP state. Setting CSn

low again will turn on the regulator and crystal

oscillator and make the chip enter the IDLE

state.

All

CC2550 register values (with the exception

of the MCSM0.PO_TIMEOUT field) are lost in

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