CC2550-RTR1 datasheet(29/55 Pages) TI

29 / 55 page

CC2550

PRELIMINARY Data Sheet (Rev.1.2)

SWRS039A

Page 29 of 54

Output power, typical,

+25

oC, 3.0 V [dBm]

PATABLE

value

Current consumption,

typical [mA]

(–55 or less)

0x00

8.0

–30

0x44

9.3

–28

0x41

9.2

–26

0x43

9.7

–24

0x84

9.8

–22

0x82

9.7

–20

0x47

10.0

–18

0xC8

11.6

–16

0x85

10.2

–14

0x59

11.6

–12

0xC6

11.2

–10

0x97

12.0

–8

0xD6

12.9

–6

0x7F

14.7

–4

0xA9

16.2

–2

0xBF

18.1

0xEE

19.4

0xFF

21.3

Table 20: Optimum PATABLE settings for various output power levels

Crystal Oscillator

A crystal in the frequency range 26-27 MHz

must be connected between the XOSC_Q1

and XOSC_Q2 pins. The oscillator is designed

for parallel mode operation of the crystal. In

addition, loading capacitors (C51 and C71) for

the crystal are required. The loading capacitor

values depend on the total load capacitance,

CL, specified for the crystal. The total load

capacitance

seen

between

the

crystal

terminals should equal CL for the crystal to

oscillate at the specified frequency.

parasitic

The parasitic capacitance is constituted by pin

input capacitance and PCB stray capacitance.

Total parasitic capacitance is typically 2.5 pF.

The crystal oscillator circuit is shown in Figure

19. Typical component values for different

values of CL are given in Table 21.

The crystal oscillator is amplitude regulated.

This means that a high current is used to start

up the oscillations. When the amplitude builds

up, the current is reduced to what is necessary

to maintain approximately 0.4 Vpp signal

swing. This ensures a fast start-up, and keeps

the drive level to a minimum. The ESR of the

crystal should be within the specification in

order to ensure a reliable start-up (see Section

4.3 on page 6).

XOSC_Q1

XOSC_Q2

XTAL

C51

C71

Figure 19: Crystal oscillator circuit

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