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WM8711SEDS/R 数据表(PDF) 32 Page - Wolfson Microelectronics plc |
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WM8711SEDS/R 数据表(HTML) 32 Page - Wolfson Microelectronics plc |
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32 / 47 page ![]() Production Data WM8711 / WM8711L w PD Rev 4.3 September 2006 32 128/192FS NORMAL MODE The Normal Mode sample rates are designed for standard 256fs and 384fs MCLK rates. However the WM8711/L is also capable of being clocked from a 128/192fs MCLK for application over limited sampling rates as shown in the table below. SAMPLING RATE DAC MCLK FREQUENCY SAMPLE RATE REGISTER SETTINGS DIGITAL FILTER TYPE kHz MHz BOSR SR3 SR2 SR1 SR0 6.144 0 0 1 1 1 48 9.216 1 0 1 1 1 2 5.6448 0 1 1 1 1 44.1 8.4672 1 1 1 1 1 2 Table 14 128/192fs Normal Mode Sample Rate Look-up Table 512/768FS NORMAL MODE 512fs and 768fs MCLK rates can be accommodated by using the CLKIDIV2 bit. The core clock to the DSP will be divided by 2 so an external 512/768 MCLK will become 256/384fs internally and the device otherwise operates as in Table 10 but with MCLK at twice the specified rate. USB MODE SAMPLE RATES In USB mode the MCLK input is 12MHz only. SAMPLING RATE DAC MCLK FREQUENCY SAMPLE RATE REGISTER SETTINGS DIGITAL FILTER TYPE kHz MHz BOSR SR3 SR2 SR1 SR0 48 12.000 0 0 0 0 0 0 44.1 (Note 2) 12.000 1 1 0 0 0 1 8 12.000 0 0 0 0 1 0 8 (Note 1) 12.000 1 1 0 0 1 1 32 12.000 0 0 1 1 0 0 96 12.000 0 0 1 1 1 3 88.2 (Note 3) 12.000 1 1 1 1 1 2 Table 15 USB Mode Sample Rate Look-Up Table Notes: 1. 8k not exact, actual = 8.021kHz 2. 44.1k not exact, actual = 44.118kHz 3. 88.1k not exact, actual = 88.235kHz 4. All other combinations of BOSR and SR[3:0] that are not in the truth table are invalid The BOSR bit represents the base over-sampling rate. This is the rate that the WM8711/L digital signal processing is carried out at and the sampling rate will always be a sub-multiple of this. In USB mode, with BOSR = 0, the base over-sampling rate is defined at 250Fs, with BOSR = 1, the base over-sampling rate is defined at 272Fs. This can be used to determine the actual audio sampling rate required by the DAC. |
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