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WM8955BLGECO/V 数据表(PDF) 30 Page - Wolfson Microelectronics plc |
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WM8955BLGECO/V 数据表(HTML) 30 Page - Wolfson Microelectronics plc |
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30 / 44 page ![]() WM8955BL Production Data w PD Rev 4.1 February 2007 30 The PLL frequency ratio R = f2/f1 (see Figure 17) can be set using K and N in registers 44 (2Ch) to 46 (2Eh): N = int (R) K = int (2 22 (R-N)) Example: MCLK = 12MHz required clock = 12.288MHz R should be chosen to ensure 5<N<13. There is a divide by 4 and selectable divide by 2 after the PLL which should be set to meet this requirement. Enabling the divide by 2 sets the required f2 = 8x 12.288MHz = 98.304MHz. R = 98.304/12 = 8.192 N = intR = 8 K = int (2 22 x (8.192-8)) = 805306 = C49BAh. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 8:5 N 1000 Integer part of PLL input/output frequency ratio. Use values greater than 5 and less than 13. R44 (2Ch) PLL Control (1) 3:0 K [21:18] 0011 R45 (2Dh) PLL Control (2) 8:0 K [17:9] 024h R46 (2Eh) PLL Control (3) 8:0 K [8:0] 1BAh Fractional part of PLL input/output frequency ratio (treat as one 22-digit binary number) R59 (3Bh) 7 KEN 0 0: Fractional part (K) disabled 1: K enabled Table 20 PLL Frequency Ratio Control The PLL performs best when f2 is around 90MHz. Its stability peaks at N=8. Some example settings are shown below. MCLK (MHz) DESIRED OUTPUT (MHz) F2 (MHz) MCLK DIV2 PLL OUT DIV2 R F2 (Hex) K (Hex) 11.91 11.2896 90.3168 0 1 7.5833 7 25545C 11.91 12.288 98.304 0 1 8.2539 8 103FF6 12 11.2896 90.3168 0 1 7.5264 7 21B089 12 12.288 98.304 0 1 8.192 8 C49BA 13 11.2896 90.3168 0 1 6.9474 6 3CA2F4 13 12.288 98.304 0 1 7.5618 7 23F548 14.4 11.2896 90.3168 0 1 6.272 6 116872 14.4 12.288 98.304 0 1 6.8267 6 34E818 19.2 11.2896 90.3168 1 1 9.408 9 1A1CAC 19.2 12.288 98.304 1 1 10.24 A F5C28 19.68 11.2896 90.3168 1 1 9.1785 9 B6D22 19.68 12.288 98.304 1 1 9.9902 9 3F6017 19.8 11.2896 90.3168 1 1 9.1229 9 7DDCA 19.8 12.288 98.304 1 1 9.9297 9 3B8023 24 11.2896 90.3168 1 1 7.5264 7 21B089 24 12.288 98.304 1 1 8.192 8 C49BA 26 11.2896 90.3168 1 1 6.9474 6 3CA2F4 26 12.288 98.304 1 1 7.5618 7 23F548 27 11.2896 90.3168 1 1 6.6901 6 2C2B30 27 12.288 98.304 1 1 7.2818 7 12089E Table 21 PLL Frequency Examples |
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